P87C51FB-4N NXP Semiconductors, P87C51FB-4N Datasheet - Page 45

MCU 8-Bit 87C 80C51 CISC 16KB EPROM 3.3V/5V 40-Pin PDIP Tube

P87C51FB-4N

Manufacturer Part Number
P87C51FB-4N
Description
MCU 8-Bit 87C 80C51 CISC 16KB EPROM 3.3V/5V 40-Pin PDIP Tube
Manufacturer
NXP Semiconductors
Datasheets

Specifications of P87C51FB-4N

Program Memory Size
16 KB
Package
40PDIP
Device Core
80C51
Family Name
87C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
UART
Number Of Timers
3
Ram Size
256 Byte
Program Memory Type
EPROM
Operating Temperature
0 to 70 °C
Controller Family/series
(8051) 8052
No. Of I/o's
32
Ram Memory Size
265Byte
Cpu Speed
16MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Core Size
8bit
Oscillator Type
External Only
Lead Free Status / RoHS Status

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P87C51FB-4N
Manufacturer:
XILINX
Quantity:
101
1. ‘0’ = Valid low for that pin, ‘1’ = valid high for that pin.
2. V
3. V
*
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
Table 9. EPROM Programming Modes
NOTES:
Table 10. Program Security Bits for EPROM Devices
NOTES:
2000 Aug 07
Read signature
Program code data
Verify code data
Pgm encryption table
Pgm security bit 1
Pgm security bit 2
Pgm security bit 3
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
ALE/PROG receives 5 programming pulses for code data (also for user array; 5 pulses for encryption or security bits) while V
12.75V. Each programming pulse is low for 100 s ( 10 s) and high for a minimum of 10 s.
1
2
3
4
PP
CC
PROGRAM LOCK BITS
= 12.75V 0.25V.
= 5V 10% during programming and verification.
SB1
U
P
P
P
MODE
SB2
U
U
P
P
1, 2
SB3
U
U
U
P
RST
PROTECTION DESCRIPTION
No Program Security features enabled. (Code verify will still be encrypted by the Encryption Array if
programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes
from internal memory, EA is sampled and latched on Reset, and further programming of the EPROM
is disabled.
Same as 2, also verify is disabled.
Same as 3, external execution is disabled.
1
1
1
1
1
1
1
PSEN
0
0
0
0
0
0
0
ALE/PROG
0*
0*
0*
0*
0*
1
1
45
EA/V
V
V
V
V
V
1
PP
1
PP
PP
PP
PP
PP
8XC51RA+/RB+/RC+/RD+/80C51RA+
P2.7
0
1
0
1
1
1
0
8XC51FA/FB/FC/80C51FA
P2.6
0
0
0
0
1
1
1
P3.7
Product specification
0
1
1
1
1
0
0
PP
8XC54/58
is held at
P3.6
0
1
1
0
1
0
1

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