P87C51FB-4N NXP Semiconductors, P87C51FB-4N Datasheet - Page 48

• Manufacturer Part Number: P87C51FB-4N
• Description: MCU 8-Bit 87C 80C51 CISC 16KB EPROM 3.3V/5V 40-Pin PDIP Tube
• Manufacturer: NXP Semiconductors

Specifications of P87C51FB-4N

• Program Memory Size: 16 KB
• Package: 40PDIP
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 32
• Interface Type: UART
• Number Of Timers: 3
• Ram Size: 256 Byte
• Program Memory Type: EPROM
• Operating Temperature: 0 to 70 °C
• Controller Family/series: (8051) 8052
• No. Of I/o's: 32
• Ram Memory Size: 265Byte
• Cpu Speed: 16MHz
• No. Of Timers: 3
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Oscillator Type: External Only

Table 11) is programmed, MOVC instructions executed from external
1. P – programmed. U – unprogrammed.
2. Any other combination of the security bits is not defined.
Philips Semiconductors
MASK ROM DEVICES
Security Bits
With none of the security bits programmed the code in the program
memory can be verified. If the encryption table is programmed, the
code will be encrypted when verified. When only security bit 1 (see
program memory are disabled from fetching code bytes from the
Table 11. Program Security Bits
NOTES:
ROM CODE SUBMISSION FOR 8K ROM DEVICES (83C51FA, AND 83C51RA+)
When submitting ROM code for the 8k ROM devices, the following must be specified:
1. 8k byte user ROM data
2. 64 byte ROM encryption key
3. ROM security bits.
Security Bit 1: When programmed, this bit has two effects on masked ROM parts:
1. External MOVC is disabled, and
2. EA is latched on Reset.
Security Bit 2: When programmed, this bit inhibits Verify User ROM.
NOTE: Security Bit 2 cannot be enabled unless Security Bit 1 is enabled.
If the ROM Code file does not include the options, the following information must be included with the ROM code.
For each of the following, check the appropriate box, and send to Philips along with the code:
2000 Aug 07
PROGRAM LOCK BITS
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
ADDRESS
0000H to 1FFFH
2000H to 203FH
2040H
2040H
Security Bit #1:
Security Bit #2:
Encryption:
1
2
SB1
U
P
SB2
U
U
1, 2
Enabled
Enabled
No
PROTECTION DESCRIPTION
No Program Security features enabled.
(Code verify will still be encrypted by the Encryption Array if programmed.)
MOVC instructions executed from external program memory are disabled from fetching code bytes from
internal memory, EA is sampled and latched on Reset, and further programming of the EPROM is disabled.
CONTENT
DATA
KEY
SEC
SEC
Disabled
Disabled
Yes
If Yes, must send key file.
48
BIT(S)
7:0
7:0
0
1
internal memory, EA is latched on Reset and all further programming
of the EPROM is disabled. When security bits 1 and 2 are
programmed, in addition to the above, verify mode is disabled.
Encryption Array
64 bytes of encryption array are initially unprogrammed (all 1s).
8XC51RA+/RB+/RC+/RD+/80C51RA+
8XC51FA/FB/FC/80C51FA
COMMENT
User ROM Data
ROM Encryption Key
FFH = no encryption
ROM Security Bit 1
0 = enable security
1 = disable security
ROM Security Bit 2
0 = enable security
1 = disable security
Product specification
8XC54/58