XC2VP7-5FFG672C Xilinx Inc, XC2VP7-5FFG672C Datasheet - Page 80
![FPGA Virtex-II Pro™ Family 11088 Cells 1050MHz 0.13um/90nm (CMOS) Technology 1.5V 672-Pin FCBGA](/photos/6/74/67431/xc2vp7-5ffg672c_sml.jpg)
XC2VP7-5FFG672C
Manufacturer Part Number
XC2VP7-5FFG672C
Description
FPGA Virtex-II Pro™ Family 11088 Cells 1050MHz 0.13um/90nm (CMOS) Technology 1.5V 672-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-II Pror
Datasheet
1.XC2VP20-5FGG676C.pdf
(430 pages)
Specifications of XC2VP7-5FFG672C
Package
672FCBGA
Family Name
Virtex-II ProÂ
Device Logic Units
11088
Number Of Registers
9856
Maximum Internal Frequency
1050 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
396
Ram Bits
811008
Number Of Logic Elements/cells
11088
Number Of Labs/clbs
1232
Total Ram Bits
811008
Number Of I /o
396
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1370
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2VP7-5FFG672C
Manufacturer:
XILINX
Quantity:
745
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Virtex-II Pro Performance Characteristics
This section provides the performance characteristics of
some common functions and designs implemented in
Virtex-II Pro devices. The numbers reported here are fully
characterized worst-case values. Note that these values are
subject to the same guidelines as
Characteristics
Table 13: Pin-to-Pin Performance
DS083 (v4.7) November 5, 2007
Product Specification
Basic Functions:
Memory:
Block RAM
Distributed RAM
16-bit Address Decoder
32-bit Address Decoder
64-bit Address Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
Combinatorial (pad to LUT to pad)
Pad to setup
Clock to Pad
Pad to setup
Clock to Pad
R
(speed files).
Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Virtex-II Pro Switching
Device Used & Speed Grade
www.xilinx.com
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
Table 13
including IOB delays; that is, delay through the device from
input pin to output pin. In the case of multiple inputs and out-
puts, the worst delay is reported.
provides pin-to-pin values (in nanoseconds)
Pin-to-Pin Performance
(with I/O Delays)
7.20
8.08
8.15
3.85
7.24
7.30
7.64
3.26
1.72
6.63
1.78
4.12
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9
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