XC3S1600E-4FGG484I Xilinx Inc, XC3S1600E-4FGG484I Datasheet - Page 77
![FPGA Spartan®-3E Family 1.6M Gates 33192 Cells 572MHz 90nm (CMOS) Technology 1.2V 484-Pin FBGA](/photos/6/72/67299/pk081-484_sml.jpg)
XC3S1600E-4FGG484I
Manufacturer Part Number
XC3S1600E-4FGG484I
Description
FPGA Spartan®-3E Family 1.6M Gates 33192 Cells 572MHz 90nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S1600E-4FGG484I
Package
484FBGA
Family Name
Spartan®-3E
Device Logic Cells
33192
Device Logic Units
3688
Device System Gates
1600000
Number Of Registers
29504
Maximum Internal Frequency
572 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
376
Ram Bits
663552
Number Of Logic Elements/cells
33192
Number Of Labs/clbs
3688
Total Ram Bits
663552
Number Of I /o
376
Number Of Gates
1600000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-XA3S1600E-UNI-G - KIT DEVELOPMENT AUTOMOTIVE ECU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
XILINX
Quantity:
140
Company:
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
XILINX
Quantity:
250
Company:
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S1600E-4FGG484I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
DS312-2 (v3.8) August 26, 2009
Product Specification
PROG_B
Recommend
open-drain
TMS
TDO
TCK
driver
TDI
+2.5V
JTAG
R
Variant Select
SPI Mode
‘0’
‘0’
‘1’
‘1’
‘1’
‘0’
P
Figure 54: Atmel SPI-based DataFlash Configuration Interface
HSWAP
M2
M1
M0
VS2
VS1
VS0
TDI
TMS
TCK
PROG_B
Spartan-3E
VCCINT
FPGA
+1.2V
GND
VCCO_0
VCCAUX
VCCO_2
CSO_B
DONE
INIT_B
DOUT
MOSI
CCLK
TDO
DIN
VCCO_0
+3.3V
+2.5V
www.xilinx.com
I
W
‘1’
+3.3V
P
SI
SO
CS
WP
RESET
RDY/BUSY
SCK
+2.5V
+3.3V
GND
VCC
DataFlash
AT45DB
PROG_B
Atmel
INIT_B
Power-on monitor is only required if
+3.3V (VCCO_2) supply is the last supply
in power-on sequence, after VCCINT
and VCCAUX. Must delay FPGA
configuration for > 20 ms after SPI
DataFlash reaches its minimum VCC.
Force FPGA INIT_B input OR PROG_B
input Low with an open-drain or open-
collector driver.
Power-On
Power-On
Monitor
Monitor
+3.3V
+3.3V
Functional Description
or
DS312-2_50a_082009
77