XC3S50-4VQG100C Xilinx Inc, XC3S50-4VQG100C Datasheet - Page 149
![FPGA Spartan®-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 100-Pin VTQFP](/photos/6/70/67082/100-tqfp_sml.jpg)
XC3S50-4VQG100C
Manufacturer Part Number
XC3S50-4VQG100C
Description
FPGA Spartan®-3 Family 50K Gates 1728 Cells 630MHz 90nm Technology 1.2V 100-Pin VTQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S50-4VQG100C
Package
100VTQFP
Family Name
Spartan®-3
Device Logic Units
1728
Device System Gates
50000
Maximum Internal Frequency
630 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
63
Ram Bits
73728
Number Of Logic Elements/cells
1728
Number Of Labs/clbs
192
Total Ram Bits
73728
Number Of I /o
63
Number Of Gates
50000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1504
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S50-4VQG100C
Manufacturer:
LT
Quantity:
714
Company:
Part Number:
XC3S50-4VQG100C
Manufacturer:
Xilinx Inc
Quantity:
1 869
Part Number:
XC3S50-4VQG100C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Table 97: FG320 Package Pinout (Continued)
DS099-4 (v2.5) December 4, 2009
Product Specification
Bank
4
4
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
VCCO_4
VCCO_4
VCCO_4
IO
IO
IO
IO/VREF_5
IO_L01N_5/RDWR_B
IO_L01P_5/CS_B
IO_L06N_5
IO_L06P_5
IO_L10N_5/VRP_5
IO_L10P_5/VRN_5
IO_L15N_5
IO_L15P_5
IO_L16N_5
IO_L16P_5
IO_L27N_5/VREF_5
IO_L27P_5
IO_L28N_5/D6
IO_L28P_5/D7
IO_L29N_5
IO_L29P_5/VREF_5
IO_L30N_5
IO_L30P_5
IO_L31N_5/D4
IO_L31P_5/D5
IO_L32N_5/GCLK3
IO_L32P_5/GCLK2
VCCO_5
VCCO_5
VCCO_5
VCCO_5
IO
IO_L01N_6/VRP_6
IO_L01P_6/VRN_6
IO_L16N_6
IO_L16P_6
IO_L17N_6
IO_L17P_6/VREF_6
IO_L19N_6
IO_L19P_6
IO_L20N_6
R
XC3S1000
XC3S1500
Pin Name
XC3S400
Number
FG320
M11
U11
Pin
T13
M8
M9
N8
P8
U6
R9
V3
V2
V4
U4
R6
R5
V5
U5
P6
P7
R7
V8
V7
R8
U9
V9
N9
P9
U8
K6
U1
R2
R1
R3
P3
P2
T5
T4
T7
T8
T6
T3
T2
T1
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VCCO
VREF
VREF
VREF
GCLK
GCLK
VREF
Type
DUAL
DUAL
DUAL
DUAL
DUAL
DUAL
DCI
DCI
DCI
DCI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
Table 97: FG320 Package Pinout (Continued)
Bank
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
Spartan-3 FPGA Family: Pinout Descriptions
IO_L20P_6
IO_L21N_6
IO_L21P_6
IO_L22N_6
IO_L22P_6
IO_L23N_6
IO_L23P_6
IO_L24N_6/VREF_6
IO_L24P_6
IO_L27N_6
IO_L27P_6
IO_L34N_6/VREF_6
IO_L34P_6
IO_L35N_6
IO_L35P_6
IO_L39N_6
IO_L39P_6
IO_L40N_6
IO_L40P_6/VREF_6
VCCO_6
VCCO_6
VCCO_6
IO
IO_L01N_7/VRP_7
IO_L01P_7/VRN_7
IO_L16N_7
IO_L16P_7/VREF_7
IO_L17N_7
IO_L17P_7
IO_L19N_7/VREF_7
IO_L19P_7
IO_L20N_7
IO_L20P_7
IO_L21N_7
IO_L21P_7
IO_L22N_7
IO_L22P_7
IO_L23N_7
IO_L23P_7
IO_L24N_7
IO_L24P_7
IO_L27N_7
IO_L27P_7/VREF_7
XC3S1000
XC3S1500
Pin Name
XC3S400
Number
FG320
Pin
M5
M3
M4
M1
P1
N4
P4
N5
N2
K5
K4
K1
K2
K7
N3
C3
C2
C1
B1
D1
D2
E3
D3
E2
E1
E4
G5
G1
G4
G3
H5
H6
L6
L5
L3
L4
L2
L1
L7
F4
F5
F2
J6
VCCO
VCCO
VCCO
VREF
VREF
VREF
VREF
VREF
VREF
Type
DCI
DCI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
149