XC3SD1800A-4FG676I Xilinx Inc, XC3SD1800A-4FG676I Datasheet - Page 84

• Manufacturer Part Number: XC3SD1800A-4FG676I
• Description: FPGA Spartan®-3A Family 1.8M Gates 37440 Cells 667MHz 90nm Technology 1.2V 676-Pin FBGA
• Manufacturer: Xilinx Inc
• Series: Spartan™-3A DSPr

Specifications of XC3SD1800A-4FG676I

• Package: 676FBGA
• Family Name: Spartan®-3A
• Device Logic Units: 37440
• Device System Gates: 1800000
• Maximum Internal Frequency: 667 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 519
• Ram Bits: 1548288
• Number Of Logic Elements/cells: 37440
• Number Of Labs/clbs: 4160
• Total Ram Bits: 1548288
• Number Of I /o: 519
• Number Of Gates: 1800000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: 122-1574 - KIT DEVELOPMENT SPARTAN 3ADSP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

User I/Os by Bank
Table 67
AWAKE pin is counted as a dual-purpose I/O.
Table 67: User I/Os Per Bank for the XC3SD1800A in the FG676 Package
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
Top
Right
Bottom
Left
Package
TOTAL
28 VREF are on INPUT pins.
Edge
indicates how the available user-I/O pins are distributed between the four I/O banks on the FG676 package. The
I/O Bank
0
1
2
3
Maximum I/Os
Input-Only
and
128
130
129
132
519
314
I/O
82
67
68
97
www.xilinx.com
INPUT
Spartan-3A DSP FPGA Family: Pinout Descriptions
28
15
21
18
82
All Possible I/O Pins by Type
DUAL
30
21
52
1
0
VREF
10
11
39
9
9
(1)
CLK
32
8
8
8
8
84