XCV100E-6FG256I Xilinx Inc, XCV100E-6FG256I Datasheet - Page 67

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XCV100E-6FG256I

Manufacturer Part Number
XCV100E-6FG256I
Description
FPGA Virtex™-E Family 32.4K Gates 2700 Cells 357MHz 0.18um (CMOS) Technology 1.8V 256-Pin FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-Er
Datasheets

Specifications of XCV100E-6FG256I

Package
256FBGA
Family Name
Virtex™-E
Device Logic Gates
32400
Device Logic Units
2700
Device System Gates
128236
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
176
Ram Bits
81920
Number Of Logic Elements/cells
2700
Number Of Labs/clbs
600
Total Ram Bits
81920
Number Of I /o
176
Number Of Gates
128236
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XCV100E-6FG256I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XCV100E-6FG256I
Manufacturer:
XILINX
0
Table 2: IOB Input Switching Characteristics (Continued)
DS022-3 (v2.9.2) March 14, 2003
Production Product Specification
Notes:
1.
2.
Sequential Delays
Clock CLK
Minimum Pulse Width, High
Minimum Pulse Width, Low
Clock CLK to output IQ
Setup and Hold Times with respect to Clock at IOB Input
Register
Pad, no delay
Pad, with delay
ICE input
SR input (IFF, synchronous)
Set/Reset Delays
SR input to IQ (asynchronous)
GSR to output IQ
A Zero “0” Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed “best-case”, but
if a “0” is listed, there is no positive hold time.
Input timing i for LVTTL is measured at 1.4 V. For other I/O standards, see
Description
R
(2)
T
T
T
T
T
Symbol
T
T
T
T
IOPICKD
IOICECK
T
IOICKPD
IOCKICE
IOSRCKI
IOPICK
IOCKIQ
IOICKP
IOSRIQ
T
GSRQ
T
CH
CL
/
/
/
XCV1000E
XCV1600E
XCV2000E
XCV2600E
XCV3200E
XCV100E
XCV200E
XCV300E
XCV400E
XCV600E
www.xilinx.com
XCV50E
1-800-255-7778
Device
All
All
All
All
All
All
0.69 / 0
1.25 / 0
1.25 / 0
1.33 / 0
1.33 / 0
1.37 / 0
1.49 / 0
1.49 / 0
1.53 / 0
1.53 / 0
1.53 / 0
1.53 / 0
0.28 /
Virtex™-E 1.8 V Field Programmable Gate Arrays
0.56
0.56
0.18
0.38
0.54
3.88
Min
0.0
Table
4.
1.3 / 0
2.8 / 0
2.8 / 0
3.0 / 0
3.0 / 0
3.1 / 0
3.4 / 0
3.4 / 0
3.5 / 0
3.5 / 0
3.5 / 0
3.5 / 0
Speed Grade
0.55 /
0.01
1.2
1.2
0.4
0.8
1.1
7.6
-8
1.4 / 0
2.9 / 0
2.9 / 0
3.1 / 0
3.1 / 0
3.2 / 0
3.5 / 0
3.5 / 0
3.6 / 0
3.6 / 0
3.6 / 0
3.6 / 0
0.7 /
0.01
1.3
1.3
0.7
0.9
1.2
8.5
-7
(1)
1.5 / 0
2.9 / 0
2.9 / 0
3.1 / 0
3.1 / 0
3.2 / 0
3.5 / 0
3.5 / 0
3.6 / 0
3.6 / 0
3.6 / 0
3.6 / 0
0.7 /
0.01
1.4
1.4
0.7
1.0
1.4
9.7
-6
Module 3 of 4
ns, max
ns, max
ns, max
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
ns, min
Units
7

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