MAX3543CTL+ Maxim Integrated Products, MAX3543CTL+ Datasheet - Page 10

• Manufacturer Part Number: MAX3543CTL+
• Description: RF Receiver Multi-band Ananlog a and Digital TV Tuner
• Manufacturer: Maxim Integrated Products

Specifications of MAX3543CTL+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note: Registers should be written in the order of ascending addresses. When changing frequency, write R00 to R07 in order of
ascending addresses to ensure proper VCO setup.
Multiband Analog and
Digital Television Tuner
The MAX3543 includes 18 programmable registers,
two status registers (read only), one register for ROM
readback (read only), and one for Maxim use only. The
programmable registers configure the VCO settings, PLL
settings, detector and AGC settings, state control, bias
adjustments, individual block shutdown, and the track-
ing filter frequency. These programmable registers are
also readable. The read-only registers include two status
registers and a ROM table data register.
Table 3. Register Configuration
10
ADDR
0x0A
0x0B
0x0C
0x0D
REG
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
_____________________________________________________________________________________
NAME
REG
R0C
R0D
R0A
R0B
R0E
R00
R01
R02
R03
R04
R05
R06
R07
R08
R09
R0F
R10
R11
R12
R13
R14
R15
ROM WRITE DATA
ROM READBACK
PWRDET CFG1
PWRDET CFG2
(VAS Trigger)
VAS CONFIG
GEN STATUS
REF CONFIG
VAS STATUS
NDIV FRAC2
NDIV FRAC1
NDIV FRAC0
MODE CTRL
SHUTDOWN
FILT CF ADJ
ROM ADDR
REGISTER
FUNCTION
BIAS ADJ
NDIV INT
Control Register Description
TEST1
IRHR
VCO
TFS
TFP
SETTING
TYPICAL
ROM
ROM
RO
RO
RO
4C
2B
D8
0A
8E
26
66
30
12
00
17
43
01
00
56
40
00
MSB
LNA2G
DWPD
STBY
CPS
—
—
—
—
—
—
—
7
LFDIV[1:0]
VVCO[1:0]
VCO[1:0]
MIXGM
SDRF
RFIN
CP
—
—
—
—
—
—
6
WPDA[2:0]
Typical bit settings are provided only for user conve-
nience and are not guaranteed at power-up. All registers
must be written no earlier than 100Fs after power-up
or recovery from a brownout event (i.e., when
drops below 1V) to initialize the registers. Then follow
up by rewriting the registers needed for channel/fre-
quency programming (i.e., registers R00–R04). The typi-
cal values listed in Table 3 configure the MAX3543 for
DTV reception with 16MHz crystal, 8MHz channel BW,
36.15MHz IF center frequency, differential LC bandpass
filter, and 666MHz RF center frequency.
SDMIX
RFLPF
VASS
VCP
—
—
—
5
LNA2B[1:0]
RDIV[1:0]
CHBW
BIT LOCATION
TRIM
SDIF
VAS
—
—
4
ROMW[7:0]
RESERVED
CPLIN[1:0]
ROMR[7:0]
VSUB[3:0]
VVSB[3:0]
IRHR[7:0]
NINT[7:0]
TFS[7:0]
F[15:8]
F[7:0]
SDIFVG
DNPD
POR
ADL
—
3
CFSET[5:0]
MIXB[1:0]
TFB[1:0]
TFP[5:0]
PULLUP
SDPD
ADE
2
ROMA[3:0]
ALC[1:0]
F[19:16]
VCOADC[2:0]
NPDA[2:0]
SDSYN
VASA
FILTB
1
RFIFD[1:0]
IFSEL[1:0]
VDIV[1:0]
LTC[1:0]
IFVGAB
SDVCO
XODIV
VASE
0
LSB
V
CC