MAX3543CTL+ Maxim Integrated Products, MAX3543CTL+ Datasheet - Page 18

• Manufacturer Part Number: MAX3543CTL+
• Description: RF Receiver Multi-band Ananlog a and Digital TV Tuner
• Manufacturer: Maxim Integrated Products

Specifications of MAX3543CTL+

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Multiband Analog and
Digital Television Tuner
The MAX3543 includes a programmable tracking filter
for each band of operation to optimize rejection of out-
of-band interference while minimizing insertion loss for
the desired received signal. The center frequency of
each tracking filter is selected by a switched-capacitor
array that is programmed by the TFS[7:0] bits in the R06
register and the TFP[5:0] bits in the R07 register.
Optimal tracking filter settings for each channel vary from
part to part due to process variations. To accommodate
part-to-part variations, each part is factory calibrated by
Maxim. During calibration the correction factors for the
series and parallel tracking capacitor arrays are calculat-
ed and written into an internal ROM table. The user must
read the ROM table upon power-up and store the data
in local memory (8 bytes total) to calculate the optimal
TFS and TFP settings for each channel. The equation for
setting TFS and TFP at each channel is available in the
device driver code provided by Maxim. Table 26 shows
the address and bits for each ROM table entry.
IMPORTANT: The MAX3543 includes on-chip tracking
filters that utilize external inductors placed on the PCB
at pins 30 through 37. Because the tracking filters oper-
ate at frequencies up to 862MHz, they are sensitive to
the inductor and PCB trace parasitics. To achieve the
optimal RF performance (gain, noise figure, and image
rejection), MAX3543 is production tested and trimmed
with the exact same inductors, their relative location
Table 26. ROM Table
18
BIAS
VHF-Low Tracking Filter.
VLS0, VLS1, VLP0, VLP1
VHF-High Tracking Filter.
VHS0, VHS1, VHP0, VHP1
UHF Tracking Filter.
US0, US1, UP0, UP1
IF Filter
IRHR
Reserved
_____________________________________________________________________________________
DESCRIPTION
Setting RF Tracking Filter Codes
Layout Recommendations
ADDR MSB
0xA
0xB
0xC
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
Reserved Reserved Reserved Reserved
VHS0[5]
VHS1[3]
VHP0[1]
VLS0[5]
VLS1[3]
VLP0[1]
Unused
IRHR[7]
US0[5]
US1[3]
UP0[1]
VHS0[4]
VHS1[2]
VHP0[0]
VLS0[4]
VLS1[2]
VLP0[0]
Unused
IRHR[6]
Unused
US0[4]
US1[2]
UP0[0]
VHS0[3]
VHS1[1]
VHP1[5]
VLS0[3]
VLS1[1]
VLP1[5]
IRHR[5]
US0[3]
US1[1]
UP1[5]
C[5]
and orientation, and the trace parasitics present on the
MAX3543 Reference Design. To avoid performance deg-
radation, PCB designs should exactly copy the RF sec-
tion of the Reference Design layout and use the induc-
tors specified in the Reference Design bill of materials.
Contact Maxim to obtain the Reference Design layout to
use as a starting point for PCB designs.
In addition to the aforementioned requirements, follow
general good RF layout practices. Keep RF signal lines
as short as possible to minimize losses and radiation.
Use controlled impedance on all high-frequency traces.
The exposed paddle must be soldered evenly to the
board’s ground plane for proper operation. Use abun-
dant vias beneath the exposed paddle and maximize
the area of continuous ground plane around the paddle
on the bottom layer for maximum heat dissipation. Use
abundant ground vias between RF traces to minimize
undesired coupling.
To minimize coupling between different sections of the
IC, the ideal power-supply layout is a star configura-
tion, which has a large decoupling capacitor at the
central V
node, with each trace going to separate V
MAX3543. Each V
with a low impedance to ground at the frequency of inter-
est. Do not share ground vias among multiple connec-
tions to the PCB ground plane.
VHS0[2]
VHS1[0]
VHP1[4]
VLS0[2]
VLS1[0]
VLP1[4]
IRHR[4]
US0[2]
US1[0]
UP1[4]
C[4]
DATA BYTE
CC
node. The V
Reserved
VHS0[1]
VHP0[5]
VHP1[3]
VLS0[1]
VLP0[5]
VLP1[3]
IRHR[3]
US0[1]
UP0[5]
UP1[3]
C[3]
CC
pin must have a bypass capacitor
CC
BIAS[3:0]
Reserved
VHS0[0]
VHP0[4]
VHP1[2]
VLS0[0]
VLP0[4]
VLP1[2]
IRHR[2]
US0[0]
UP0[4]
UP1[2]
C[2]
traces branch out from this
Reserved
VHS1[5]
VHP0[3]
VHP1[1]
VLS1[5]
VLP0[3]
VLP1[1]
IRHR[1]
US1[5]
UP0[3]
UP1[1]
C[1]
CC
pins of the
Reserved
VHS1[4]
VHP0[2]
VHP1[0]
VLS1[4]
VLP0[2]
VLP1[0]
IRHR[0]
US1[4]
UP0[2]
UP1[0]
C[0]
LSB