MAX2390ETI+T Maxim Integrated Products, MAX2390ETI+T Datasheet - Page 21

• Manufacturer Part Number: MAX2390ETI+T
• Description: RF Receiver IC RECEIVERS ZERO-IF-EP
• Manufacturer: Maxim Integrated Products

Specifications of MAX2390ETI+T

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
8
9
W-CDMA/W-TDD/TD-SCDMA Zero-IF Receivers
LNA_OUT LNA Output. Internally matched to 50Ω.
LO_OUT+ (MAX2396/MAX2400) VCO Divide-by-3 Noninverting Output to Synthesizer
LO_OUT-
LNA_IN
G_MXR
G_LNA
SDATA
NAME
REFIN
SHDN
TUNE
SCLK
BIAS
GND
GND
IDLE
AGC
V
V
V
V
V
V
RF+
RF-
CP
LD
Q+
CS
Q-
I+
CC
CC
CC
CC
CC
I-
CC
______________________________________________________________________________________
Supply Pin for I/Q Mixers. This pin must be bypassed to system ground as close to the pin as possible.
The ground vias for the bypass capacitor should not be shared by any other branch. Use 100pF for RF
bypassing to GND.
N oni nver ti ng RF Inp ut to Z er o- IF D em od ul ator ( 200Ω D i ffer enti al N om i nal Im p ed ance Betw een RF+ and RF- )
Inverting RF Input to Zero-IF Demodulator (200Ω Differential Nominal Impedance Between RF+ and RF-)
External Bias Resistor Connection
Supply Pin for LNA. This pin must be bypassed to system ground as close to the pin as possible.
The ground vias for the bypass capacitor should not be shared by any other branch. Use 100pF for RF
bypassing to GND.
LNA Gain Mode Logic-Control Pin
RF Ground Return for LNA. Provide multiple vias to the system ground plane as close to the pin as possible.
LNA Input. Externally matched to 50Ω. See the Applications Information section for more information.
RF VCO Varactor Ground Return. Provide multiple vias to the system ground plane as close to the pin
as possible.
Supply Pin for VCO. This pin must be bypassed to system ground as close to the pin as possible.
The ground vias for the bypass capacitor should not be shared by any other branch. Use 100pF for RF
bypassing to GND.
RF VCO Varactor TUNE Input. Connect PLL loop filter between CP and TUNE.
(MAX2390–MAX2393, MAX2401) High-Impedance Output of the RF Charge Pump. The RF PLL’s loop filter is
connected between this pin and TUNE.
(MAX2390–MAX2393, MAX2401) Supply Pin for Synthesizer Charge Pump. Use 100nF for bypassing to GND.
(MAX2396/MAX2400) VCO Divide-by-3 Inverting Output to Synthesizer
Supply Pin for On-Chip Digital Circuitry. Use 100nF for bypassing to GND.
Synthesizer Reference Frequency Input. AC-couple to the reference source through 1nF.
(MAX2390–MAX2393, MAX2401) Open-Drain Output Indicating LOCK Status of the RF PLL. It is open drain to
wire-OR with LD from TX chip.
(MAX2396/MAX2400) Idle Mode Enable. Drive IDLE low to disable all blocks except serial bus, VCO, and
divide-by-3 prescaler to PLL.
Shutdown Logic Pin for Entire Receiver (Active Low)
Analog Input Pin Controlling the Baseband VGA Gain
Noninverting Baseband Output for Q Channel
Inverting Baseband Output for Q Channel
Inverting Baseband Output for I Channel
Noninverting Baseband Output for I Channel
Supply Pin for Baseband Circuitry. Use 100nF for bypassing to GND.
3-Wire Serial Bus Enable Input (Active Low)
Mixer Gain Mode Logic-Control Pin
3-Wire Serial Bus Data Input
3-Wire Serial Bus Clock Input
FUNCTION
Pin Description
21