ATA5823-PLQW80 Atmel, ATA5823-PLQW80 Datasheet - Page 88
![RF Transceiver RF Data Control Duplex Transceiver](/photos/30/99/309912/qfn-48_sml.jpg)
ATA5823-PLQW80
Manufacturer Part Number
ATA5823-PLQW80
Description
RF Transceiver RF Data Control Duplex Transceiver
Manufacturer
Atmel
Datasheet
1.ATA5824-PLQW.pdf
(98 pages)
Specifications of ATA5823-PLQW80
Output Power
10 dBm
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-48
Minimum Operating Temperature
- 40 C
Modulation
ASK, FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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19. Electrical Characteristics: Car Application
All parameters refer to GND and are valid for T
V
specified. Microcontroller interface current I
88
VS2
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
12.10
12.11
12.12
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
12.9
No.
12
= 5V and T
Parameters
Car Application
Supported voltage
range
Supply voltage for
microcontroller-
interface
Supply current
OFF mode
Current in IDLE mode
on pin VS2
Supply current IDLE
mode
Current in RX mode
on pin VS2
Supply current RX
mode
Current during
T
Current in
RX Polling mode on
pin VS2
Supply current RX
polling mode
Current in TX mode
on pin VS2
Supply current TX
mode
ATA5823/ATA5824
Startup_PLL
amb
= 25°C. Application according to
on pin VS2
Test Conditions
Car application
V
_OFF =
I
V
CLK enabled
CLK disabled
CLK enabled
V
CLK enabled
V
V
315 MHz/5dBm
315 MHz/10dBm
433.92 MHz/5dBm
433.92 MHz/10dBm
868.3 MHz/5dBm
868.3 MHz/10dBm
I
OFF_VSINT
Poll""
VS2
VS2
VS2
VS2
VS2
= V
= 5V
= 5V
= 5V
I
5V
OFF_VS2
=
VSINT
VSINT
I
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -
IDLE_VS2
amb
has to be added.
+
= –40°C to +105°C, V
5.25VI
Figure 4-1 on page
T
S
Sleep
17,27
Pin
17,
17,
+
17,
17,
17
27
17
27
17
27
17
27
17
27
I
T
Startup_PLL_VS2
Sleep
I
VS2
7. f
Startup_PLL_VS2
+
Symbol
I
T
IDLE_VS2
I
I
V
RF
I
I
= 4.4V to 5.6V, V
RX_VS2
TX_VS2
Startup_PLL
I
S_IDLE
I
V
S_OFF
I
S_Poll
S_RX
VSINT
S_TX
VS2
= 315.0 MHz/433.92 MHz/868.3 MHz unless otherwise
T
I
I
I
I
I
IDLE_VS2
RX_VS2
Startup_PLL_VS2
TX_VS2
FD3,4_VS2
Startup_PLL
+
T
Startup_Sig_Proc
Min.
2.15
or
or
4.4
or
VSINT
+
or
I
RX_VS2
= 4.4V to 5.25V. Typical values at
I
Typ.
10.8
10.7
16.2
10.9
16.3
11.6
17.8
430
360
S_IDLE
0.5
9.1
I
I
S_RX
S_TX
I
S_Poll
+
VS2
T
= I
= I
= I
Bit check
T
= I
IDLE_VS2
RX_VS2
TX_VS2
Max.
Startup_Sig_Proc
5.25
14.5
13.9
21.0
14.0
21.0
15.0
23.0
600
520
5.6
12
Poll
6
+ I
+ I
+ I
VSINT
+ I
VSINT
VSINT
VSINT
Unit
mA
mA
mA
µA
µA
µA
V
4829D–RKE–06/06
V
+
T
Bit check
Type*
A
A
A
A
B
B
C
B
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