ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 13

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ISP1508AET

Manufacturer Part Number
ISP1508AET
Description
RF Transceiver USB 2.0 ULPI TRNSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1508AET

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935283548118 ISP1508AET-T

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NXP Semiconductors
8. Functional description
ISP1508A_ISP1508B_1
Product data sheet
8.1 ULPI interface controller
8.2 USB serializer and deserializer
8.3 Hi-Speed USB (USB 2.0) ATX
The ISP1508 provides an 8-pin or 12-pin interface that is compliant with UTMI+ Low Pin
Interface (ULPI) Specification Rev. 1.1 . This interface must be connected to a USB link.
The ULPI interface controller provides the following functions:
For more information on the ULPI protocol, see
The USB data serializer prepares data to transmit on the USB bus. To transmit data, the
USB link sends a transmit command and data on the ULPI bus. The serializer performs
parallel-to-serial conversion, bit stuffing and NRZI encoding. For packets with a PID, the
serializer adds a SYNC pattern to the start of the packet, and an EOP pattern to the end
of the packet. When the serializer is busy and cannot accept any more data, the ULPI
interface controller de-asserts NXT.
The USB data deserializer decodes data received from the USB bus. When data is
received, the deserializer strips the SYNC and EOP patterns, and then performs
serial-to-parallel conversion, NRZI decoding and discarding of stuff bits on the data
payload. The ULPI interface controller sends data to the USB link by asserting DIR, and
then asserting NXT whenever a byte is ready. The deserializer also detects various
receive errors, including bit stuff errors, elasticity buffer underrun or overrun, and
byte-alignment errors.
The Hi-Speed USB ATX block is an analog front-end containing the circuitry needed to
transmit, receive and terminate the USB bus in high-speed, full-speed and low-speed, for
USB peripheral, host or OTG implementations. The following circuitry is included:
ULPI-compliant interface and register set
Allows full control over the USB peripheral, host or OTG functionality
Parses the USB transmit and receive data
Prioritizes the USB receive data, USB transmit data, interrupts and register operations
Low-power mode
Transparent UART mode
3-pin serial mode
6-pin serial mode
Generates RXCMDs (status updates)
Maskable interrupts
Differential drivers to transmit data at high-speed, full-speed and low-speed
Differential and single-ended receivers to receive data at high-speed, full-speed and
low-speed
Squelch circuit to detect high-speed bus activity
Rev. 01 — 14 August 2007
ISP1508A; ISP1508B
Section
10.
ULPI HS USB transceiver
© NXP B.V. 2007. All rights reserved.
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