ISP1508AET NXP Semiconductors, ISP1508AET Datasheet - Page 7

• Manufacturer Part Number: ISP1508AET
• Description: RF Transceiver USB 2.0 ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1508AET

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935283548118 ISP1508AET-T

NXP Semiconductors
Table 2.
[1]
[2]
[3]
7. Detailed description of pins
ISP1508A_ISP1508B_1
Product data sheet
Symbol
V
V
XTAL1
XTAL2
CC
BUS
Symbol names ending with underscore N (for example, NAME_N) indicate active LOW signals.
I = input; O = output; I/O = digital input/output; OD = open-drain output; AI/O = analog input/output; P = power or ground pin.
A detailed description of these pins can be found in
[1]
Pin description
Pin
F3
F4
F5
F6
7.1 DATA[7:0]
7.2 V
Bidirectional data bus pins. In SDR mode, these pins are synchronized to the rising edge
of CLOCK. In DDR mode, DATA[3:0] are synchronized to both the rising and falling edges
of CLOCK, and DATA[7:4] can be left unconnected.
The USB link must drive these pins to LOW when the ULPI bus is idle. When the link has
data to transmit to the PHY, it drives a nonzero value. Weak pull-down resistors are
incorporated on these pins as part of the interface protect feature. For details, see
Section
These pins can also be 3-stated when pin CHIP_SEL is not active.
These pins are reconfigured to carry various data types when the chip is not in
synchronous mode. For details, see
The input power pin that sets the I/O voltage level. A 0.1 F decoupling capacitor is
recommended on each V
Type
P
AI/O
AI/O
AI/O
•
•
•
•
•
•
•
•
•
CC(I/O)
…continued
CFG1
CFG2
CHIP_SEL
CLOCK
DATA[7:0]
DIR
NXT
STP
TEST_N
[2]
8.11.1.
Description
input supply voltage or battery source; 3.0 V to 4.5 V
Remark: Below 3.0 V, USB full-speed and low-speed transactions are not guaranteed,
though some devices may work with the ISP1508 at these voltages.
connect to the V
internal 70 k pull-down resistor is present on this pin)
crystal oscillator or clock input; 1.8 V peak input allowed; frequency depends on status
on the CFG1 and CFG2 pins
crystal oscillator output; when a clock is driven into the XTAL1 pin, leave this pin open
[3]
Rev. 01 — 14 August 2007
Section
BUS
CC(I/O)
pin of the USB connector; if this pin is not in use, leave it open (an
7.
pin. V
Section
CC(I/O)
powers the on-chip pads of the following pins:
9.2.
ISP1508A; ISP1508B
ULPI HS USB transceiver
© NXP B.V. 2007. All rights reserved.
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