DLP-HS-FPGA2 DLP Design Inc, DLP-HS-FPGA2 Datasheet - Page 6

• Manufacturer Part Number: DLP-HS-FPGA2
• Description: Interface Modules & Development Tools USB FPGA Module w/ Xilinx XC3S400A
• Manufacturer: DLP Design Inc
• Series: -r

Specifications of DLP-HS-FPGA2

• Interface Type: USB
• Description/function: USB - FPGA Module
• Dimensions: 71.1 mm x 30.5 mm x 5.3 mm
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Channels: 2
• Operating Supply Voltage: 3.6 V to 6 V
• Product: Interface Modules
• Supply Voltage (max): 6 V
• Supply Voltage (min): 3.6 V
• Wireless Frequency: 66 MHz
• Main Purpose: Interface, USB to FPGA
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: FT2232D, XC3S400A-4FTG256C
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: Xilinx Spartan 3A, FTDI FT2232H Dual-Channel High-Speed USB IC

The FPGA device used on the DLP-HS-FPGA2 is the Xilinx Spartan™ 3A: XC3S400A-4FTG256
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4.0 ABSOLUTE MAXIMUM RATINGS
Stresses above those listed here may cause permanent damage to the DLP-HS-FPGA:
Operating Temperature: 0-70°C
Voltage on Digital Inputs with Respect to Ground: -0.5V to +4.1 V
Sink/Source Current on Any I/O: 24 mA (using LVTTL as the FPGA I/O standard)
5.0 WARNINGS
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6.0 BITLOADAPP SOFTWARE
Windows software is provided for use with the DLP-HS-FPGA that will load an FPGA configuration
(*.bit) file directly to the SPI Flash device via the USB interface. This application (illustrated below) will
allow the user to erase the Flash, verify the erasure and then program and verify the Flash:
Rev. 1.3 (March 2011)
Part Number:
System Gates:
Equivalent Logic Cells:
CLB Array:
Rows:
Columns:
Total CLB’s:
Total Slices:
Total Flip Flops:
Total 4-Input LUT’s:
Distributed RAM Bits:
Block RAM Bits:
Dedicated Multipliers:
DCM’s:
Unplug from the host PC and power adapter before connecting to I/O on the DLP-HS-FPGA.
Isolate the bottom of the board from all conductive surfaces.
Observe static precautions to prevent damage to the DLP-HS-FPGA module.
XC3S400A-4FTG256C
400,000
40
24
896
3,584
7,168
7,168
360K
4
56K
8,064
20
6
© DLP Design, Inc.