ICS854S058AGILF IDT, Integrated Device Technology Inc, ICS854S058AGILF Datasheet - Page 9

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ICS854S058AGILF

Manufacturer Part Number
ICS854S058AGILF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS854S058AGILF

Lead Free Status / RoHS Status
Compliant

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ICS854S058AGILF
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ICS854S058I Datasheet
LVPECL Clock Input Interface
The PCLK /nPCLK accepts LVPECL, LVDS, SSTL and other
differential signals. The differential signal must meet the V
V
for the PCLK/nPCLK input driven by the most common driver types.
Figure 1A. PCLK/nPCLK Input Driven by a 3.3V LVDS
Figure 1C. PCLK/nPCLK Input Driven by a 3.3V LVPECL
ICS854S058AGI REVISION A DECEMBER 11, 2009
CMR
input requirements. Figures 1A to 1D show interface examples
3.3V
3.3V
LVPECL
LVDS
Driver
Driver
Zo = 50
Zo = 50
Zo = 50
Zo = 50
R3
125
3.3V
R1
84
R4
125
R2
84
R1
100
PCLK
nPCLK
PCLK
nPCLK
3.3V
LVPECL
Input
3.3V
LVPECL
Input
PP
and
9
The input interfaces suggested here are examples only. If the driver
is from another vendor, use their termination recommendation.
Please consult with the vendor of the driver component to confirm the
driver termination requirements.
Figure 1B. PCLK/nPCLK Input Driven by an SSTL Driver
Figure 1D. PCLK/nPCLK Input Driven by a 3.3V LVPECL
3.3V
3.3V LVPECL
2.5V
R5
100 - 200
SSTL
Driver with AC Couple
R6
100 - 200
Zo = 60
Zo = 60
Zo = 50
Zo = 50
8:1, DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER
C1
C2
R3
120
2.5V
R1
120
©2009 Integrated Device Technology, Inc.
R3
84
3.3V
R1
125
R4
120
R2
120
R4
84
R2
125
PCLK
nPCLK
PCLK
nPCLK
3.3V
3.3V
LVPECL
Input
LVPECL
Input

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