COM20020I-DZD-TR Standard Microsystems (SMSC), COM20020I-DZD-TR Datasheet - Page 59

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COM20020I-DZD-TR

Manufacturer Part Number
COM20020I-DZD-TR
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of COM20020I-DZD-TR

Number Of Transceivers
1
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
COM20020I-DZD-TR
Manufacturer:
Microchip
Quantity:
1 048
Part Number:
COM20020I-DZD-TR
Manufacturer:
Microchip Technology
Quantity:
10 000
5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Datasheet
SMSC COM20020I Rev D
D0-D7
A0-A2
nCS
nDS
DIR
Figure 8.7 - Non-Multiplexed Bus, 68XX-Like Control Signals; Read Cycle
**
Note 1:
Note 2: Read cycle for Address Pointer Low/High Registers occurring after an access
*
T
T
T
T
t10
t11
opr
ARB
ARB
ARB
t1
t2
t3
t4
t5
t6
t7
t8
t9
now be 45nS measured from the leading edge of nCS.
nCS may become active after control becomes active, but the access time (t8) will
is the period of operation clock. It depends on CKUP1 and CKUP0 bits
is the Arbitration Clock Period
is identical to T
is twice T
The Microcontroller typically accesses the COM20020 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020 cycles.
to Data Register requires a minimum of 5T
the leading edge of the next nDS.
Address Setup to nDS Active
Address Hold from nDS Inactive
nCS Setup to nDS Active
nCS Hold from nDS Inactive
DIR Setup to nDS Active
Cycle Time (nDS Low to Next Time Low)
DIR Hold from nDS Inactive
nDS Low to Valid Data
nDS High to Data High Impedence
nDS Low Width
nDS High Width
opr
if SLOW ARB = 1
t1
opr
if SLOW ARB = 0
DATASHEET
t5
t3
Parameter
CASE 1: RBUSTMG bit = 0
Page 59
t8
VALID
ARB
t10
from the trailing edge of nDS to
t6
VALID DATA
4T
min
15
10
10
10
5**
60
20
ARB
0
0
*
40**
max
20
t9
t2
t7
t4
Note 2
t11
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Revision 12-05-06

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