TXC-06880BIOG Transwitch Corporation, TXC-06880BIOG Datasheet - Page 30
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TXC-06880BIOG
Manufacturer Part Number
TXC-06880BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet
1.TXC-06880BIOG.pdf
(122 pages)
Specifications of TXC-06880BIOG
Operating Supply Voltage (typ)
1.8/3.3V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TXC-06880BIOG
Manufacturer:
SAMWHA
Quantity:
34 000
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Envoy-CE2 Device
DATA SHEET
TXC-06880
3 0 o f 12 2
SMIIREFCLKA
GATXCLKO
GATXCLKI
GARXCLK
GARXDV
GARXER
GATXEN
GATXER
Symbol
Symbol
RX5B
RX6B
RX7B
RX0A
TX5B
TX6B
TX7B
TX0A
GMII/MII INTERFACE PINS FOR GMII Port 0 (Configurable MAC A)
(SMIIREFCLKA must be active)
Lead No.
Lead No.
W1
G3
G5
G4
G1
V1
U4
V2
V3
C4
E3
H3
T5
F1
F4
F2
I/O/P*
I/O/P*
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
-
Technical Characteristics
CMOS
LVTTL
CMOS
LVTTL
CMOS
LVTTL
LVTTL
CMOS
LVTTL
LVTTL
CMOS
CMOS
LVTTL
LVTTL
CMOS
LVTTL
12mA
12mA
12mA
16mA
12mA
Type
Type
8mA
8mA
Transmit Data Port 13: SMII port 13 data out signal.
Receive Data Port 13: SMII port 13 data in signal.
Transmit Data Port 14: SMII port 14 data out signal.
Receive Data Port 14: SMII port 14 data in signal.
Transmit Data Port 15: SMII port 15 data out signal.
Receive Data Port 15: SMII port 15 data in signal.
SMII Reference Clock for Configurable MAC A:
125 MHz Clock. Must be active to support the
Ethernet statistics registers of CMAC A - even when
the CMAC is configured for GMII Mode.
GMII A Transmit Clock Output: 125 MHz output
clock to which Data, Enable, and Error output signals
are synchronized.
GMII A Transmit Clock: 125 MHz input clock
GMII A Receive Clock: 125 MHz input clock
GMII A Transmit Enable: This active high output
signal is asserted to indicate that valid data is present
on the Data outputs.
GMII A Transmit Error: This active high output
signal is asserted to indicate that a coding violation
exists in the output data stream.
GMII A Receive Data Valid: This active high input
signal is asserted to indicate that valid data is present
on the input data leads.
GMII A Receive Error: This active high input signal is
asserted to indicate that an error was detected in the
incoming data stream.
Transmit Data Port 0A: Bit 0 (LSB) of 8-bit GMII A
Transmit Interface in GMII mode or Bit 0 of 4-bit MII A
Transmit interface.
Receive Data Port 0A: Bit 0 (LSB) of 8-bit GMII A
Receive Interface in GMII mode or Bit 0 of 4-bit MII A
Receive interface.
-
Name/Function
Name/Function
PRELIMINARY TXC-06880-MB, Ed. 4
February 2005
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