TXC-06885BIOG Transwitch Corporation, TXC-06885BIOG Datasheet - Page 11

• Manufacturer Part Number: TXC-06885BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06885BIOG

• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Temperature Classification: Industrial
• Package Type: BGA
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

PRELIMINARY TXC-06885-MB, Ed. 6A
February 2005
2.1.2 Serial Media Independent Interface (SMII)
2.1.3 Gigabit Media Independent Interface (GMII) and Media Independent Interface (MII)
The Serial Media Independent Interface (SMII) is capable of operating at 10/100 Mbit/s mixed
mode. The SMII is configurable to operate in either Full Duplex or Half Duplex mode.
Control and Data are transported across the Tx and Rx signals in 10 bit segments. The
segments are synchronized using the SYNC signal. From the 10 bits, 2 bits are control and
the other 8 bits are data. In 100 Mbit/s mode, every 10 bit segment transfers a new byte of
data. In 10 Mbit/s mode, each 10 bit segment is repeated ten times. Please refer to the SMII
specification for further details.
Each SMII port is comprised of:
The GMII interface of the Envoy-CE4 is capable of operating at 1 Gbit/s. When configured in
MII mode, the interface is capable of operating at 10/100 Mbit/s. The GMII/MII ports allow the
Envoy-CE4 to connect to Multi-rate Gigabit Ethernet PHY devices.
When configured as GMII, each port is comprised of:
Note: The GMII is a 3.3 V interface that will only work with a 3.3 V PHY device.
When configured as MII, each port is comprised of:
Note: The GMII signal pins are muxed with the SMII signal pins.
• Two serial data signals (Tx and Rx) per port
• 125 MHz reference clock signal (Clock) per Configurable MAC
• Synchronization signal (SYNC) per Configurable MAC
• Two data buses, Transmit and Receive, each 8 bits wide
• Two clock signals, 1 per direction
• Two network status signals (Rx Error and Tx Error)
• Two control signals (Rx Data Valid and Tx Enable)
• All signals are synchronous to the clock
• Two data buses, Transmit and Receive, each 4 bits wide
• Two clock signals, 1 per direction
• Four Status signals (Rx Data Valid, Tx Enable, Carrier sense, and Collision detect)
• MAC control sublayer provides support for control frames including PAUSE frames
• Automatic PAUSE Frame Generation and Termination
• 62 KByte ingress FIFO per Configurable MAC
• 32 KByte egress FIFO per Configurable MAC
• Far end switch side loopback for diagnostic capability
• Packet statistics and performance monitoring support for Remote Network Monitoring
(RMON)
• The transmit clock is an output and the receive clock is an input
• An input pad is provided to source the transmit clock from an external oscillator
• Uses Least Significant Nibble of the GMII bus
• Both the transmit and receive clocks are inputs to the Envoy-CE4
- Functional Description -
Envoy-CE4 Device
DATA SHEET
TXC-06885
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