LAN9420-NU Standard Microsystems (SMSC), LAN9420-NU Datasheet - Page 82

• Manufacturer Part Number: LAN9420-NU
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9420-NU

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Revision 1.4 (12-17-08)
b. The software application must wait for all pending DMA transactions to complete. Upon completion,
2. The ENERGYON event must be enabled as a PHY interrupt source. This is done by setting the
3. The PHY must be enabled for the energy detect power down mode. This is done by setting the
4. Bit 0 of the Wakeup Status (WUPS[0]) in the
5. Set the
6. Set the
7. If the device is to be placed in the D3 state, set the
On detection of Ethernet activity (energy), the device will assert the nPME signal. The nPME signal
will remain asserted until the
cleared by the Host.
no further transactions are permitted.
INT7
EDPWRDOWN
down mode places the PHY in a reduced power state. In this mode of operation the PHY is not
capable of receiving or transmitting Ethernet data. In this state the PHY will assert its internal
interrupt if it detects Ethernet activity. Refer to
page 73
must be cleared since a set bit will cause the immediate assertion of wake event when ED_EN is
set. The WUPS[0] bit will not clear if the internal PHY interrupt is asserted.
(PMT_CTRL).
(PCI_PMCSR). Note that PME_EN must be set before entering the D3 state. If this bit is not set,
the internal PHY will be reset and placed in the General Power-Down state and the device will not
be able to detect an Ethernet link status change.
of the
device will enter D3
State," on page
bit in the PHY’s
PCI Power Management Control and Status Register (PCI_PMCSR)
Energy-Detect Wakeup Enable (ED_EN)
PME Enable (PME_EN)
for more information.
77.
bit in the PHY’s
HOT
Interrupt Source Flag
. Device behavior in this state is described in
PME Enable (PME_EN)
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
DATASHEET
Mode Control/Status
bit in the
82
PCI Power Management Control and Status Register
register.
Power Management Control Register (PMT_CTRL)
Section 3.6.8.2, "Energy Detect Power-Down," on
bit in the
and/or the
Power Management State (PM_STATE)
register. Enabling the energy detect power-
Power Management Control Register
PME Status (PME_STATUS)
Section 3.7.4.4, "The D3HOT
SMSC LAN9420/LAN9420i
to 11b (‘D3’ state). The
Datasheet
bits are
field