TS81102G0VTP E2V, TS81102G0VTP Datasheet - Page 27

• Manufacturer Part Number: TS81102G0VTP
• Manufacturer: E2V

Specifications of TS81102G0VTP

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: -40C to 110C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Thermal Resistance
from Junction to
Ambient: RTHJA
Thermal Resistance
from Junction to
Bottom of Balls
Figure 22. Thermal Resistance from Junction to Bottom of Balls
2105C–BDC–11/03
DEMUX − Axpproximative Model for 240 TBGA
Assumptions:
Square die 7.0 x 7.0 = 49 mm², 75 µm thick Epoxy/Ag glue, 0.40 mm copper thickness under die,
Sn60Pb40 columns diameter 0.76 mm, 23 x 23 mm TBGA
(Top half of thickness)
Epoxy/Ag glue
Thermal Resistance Junction to case typical =
0.10 + 0.60 + 0.05 + 0.05 + 0.25 = 1.05°C/W
Thermal Resistance Junction to case Max = 1.40°C/W
λ = 0.025Watt/°C
Copper base
Copper base
λ = 0.95Watt/°C
Silicon Die
λ = 25Watt/°C
Black ink
49 mm²
Typical values
(values are in °C/Watt)
Silicon Junction
package
Top of
0.10
0.60
0.05
0.05
0.25
1.70
(104 balls)
A pin-fin type heat sink of a size 40 mm x 40 mm x 8 mm can be used to reduce thermal resis-
tance. This heat sink should not be glued to the top of the package as Atmel cannot guarantee
the attachment to the board in such a configuration. The heat sink could be clipped or screwed
on the board.
With such a heat sink, the Rthj-a is about 6 C/W (if we take 10 C/W for Rth from the junction
to air through the package and heat sink in parallel with 15 C/W from the junction to the board
through the package body, through balls and through board copper).
Without the heat sink, the Rth junction to air for a package reported on-board can be estimated
at 13 to 20 C/W (depending on the board used).
The worst value 20 C/W is given for a 1-layer board (13 C for a 4-layer board).
The thermal resistance from the junction to the bottom of the balls of the package corresponds
to the total thermal resistance to be considered from the silicon’s die junction to the interface
with a board. This thermal resistance is estimated to be 4.8 C/W max.
The following diagram points out how the previous thermal resistances were calculated for this
packaged device.
2 internal
rows
1.87
0.40
0.25
(136 balls)
2 external
rows
1.43
0.31
Tape + glue
over balls
λ = 0.02Watt/°C
Balls
PbSn
λ = 0.40Watt/°C
Case were all Bottom of Balls are connected to infinite heatsink
(values are in °C/Watt)
Silicon Junction
Thermal Resistance Junction to bottom of balls = 4.8°C/W Max
0.10
0.60
0.05
at bottom of balls
Infinite heatsink
1.70
2.47
Reduction
0.25
1.74
at bottom of balls
Infinite heatsink
Junction
Silicon
2.45
2.47
Reduction
1.99
TS81102G0
at bottom of balls
Infinite heatsink
Junction
Silicon
3.55
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