TS68C429AVF E2V, TS68C429AVF Datasheet - Page 30
TS68C429AVF
Manufacturer Part Number
TS68C429AVF
Description
Manufacturer
E2V
Datasheet
1.TS68C429AVF.pdf
(43 pages)
Specifications of TS68C429AVF
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Lead Free Status / RoHS Status
Compliant
Available stocks
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Register Description
30
TS68C429A
Figure 27. Self-test Register
The self-test register can be split in three parts:
1. bit 0: Used to enable receiver wrong parity detection. This bit has been imple-
2. Self-test command:
3. Self-test result:
mented to guarantee compatibility with previous designs:
0: Receiver wrong parity detection disable,
1: Receiver wrong parity detection enable.
bit 5: Receiver test clock mode:
bit 6: Start transmitter self-test if a 0 to 1 transition is programmed (before a new
self-test, the user must reprogram this bit to 0).
bit 7: Start receiver Label Control Matrix self-test if a 0 to 1 transition is programmed
(before a new self-test, the user must reprogram this bit to 0).
bit 8: 0: Transmitter 1 self-test is running,
bit 9: 0: Transmitter 2 self-test is running,
bit 10: 0: Transmitter 3 self-test is running,
bit 11: Result of Transmitter 1 self-test:
bit 12: Request of Transmitter 2 self-test:
0: If CLK-SYS is less or equal to 10 MHz,
1: If CLK-SYS is higher than 10 MHz.
1: End of Transmitter 1 self-test.
1: End of Transmitter 2 self-test.
1: End of Transmitter 3 self-test.
0: (if bit 8 is set to 1) self-test pass,
1: Self-test fail.
0: (if bit 9 is set to 1) self-test pass,
2120A–HIREL–08/02