TS68C429AVF E2V, TS68C429AVF Datasheet - Page 7

• Manufacturer Part Number: TS68C429AVF
• Manufacturer: E2V

Specifications of TS68C429AVF

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 132
• Lead Free Status / RoHS Status: Compliant

Design and Construction
Terminal Connections
Package
Special Recommended
Conditions for CMOS Devices
Electrical Characteristics
Table 1. Absolute Maximum Ratings
2120A–HIREL–08/02
Symbol
P
T
T
V
T
dmax
leads
V
case
T
CC
stg
I
j
Parameter
Supply Voltage
Input Voltage
Max Power Dissipation
Operating Temperature
Storage Temperature
Junction Temperature
Lead Temperature
Depending on the package, the terminal connections is detailed in “Terminal Connec-
tions” on page 41.
The circuits are packaged in a hermetically sealed ceramic package which is conform to
case outlines of MIL-STD 1835 (when defined):
•
•
The precise case outlines are described at the end of this specification (“Package
Mechanical Data” on page 40) and into MIL-STD-1835.
•
The CMOS cell is basically composed of two complementary transistors (a P-channel
and an N-channel), and, in the steady state, only one transistor is turned-on. The active
P-channel transistor sources current when the output is a logic high and presents a high
impedance when the output is a logic low. Thus the overall result is extremely low power
consumption because there is no power loss through the active P-channel transistor.
Also since only once transistor is determined by leakage currents.
Because the basic CMOS cell is composed of two complementary transistors, a para-
sitic semiconductor controlled rectifier (SCR) formed and may be triggered when an
input exceeds the supply voltage. The SCR that is formed by this high input causes the
device to become “latched” in a mode that may result in excessive current drain and
eventual destruction of the device. Although the device is implemented with input pro-
tection diodes, care should be exercised to ensure that the maximum input voltages
specification is not exceeded from voltage transients; others may require no additional
circuitry.
•
The TS68C429A doesn’t satisfy totally the input/output drive requirements of TTL logic
devices, see Table 4.
CMOS Latch-up
CMOS/TTL Levels
PGA 84,
CQFP 132.
Max 5 sec. soldering
Test Conditions
M suffix
V suffix
-0.3
-0.3
Min
-55
-40
-55
+125
+150
+160
+270
Max
+7.0
+7.0
400
+85
TS68C429A
Unit
mW
°C
°C
°C
°C
°C
V
V
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