ADM6996L-AA-T-1 Lantiq, ADM6996L-AA-T-1 Datasheet - Page 32

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ADM6996L-AA-T-1

Manufacturer Part Number
ADM6996L-AA-T-1
Description
Manufacturer
Lantiq
Datasheet

Specifications of ADM6996L-AA-T-1

Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADM6996L-AA-T-1
Manufacturer:
INTEL
Quantity:
35
Field
T7
T6
T5
T4
T3
T2
T1
T0
Note: Value 3 ~ 0 are for priority queues Q3~Q0 respectively. The Weight ratio is Q3: Q2: Q1: Q0 = 8: 4: 2: 1. The
Table 13
Preamble/SFD
Configuration Register 2
Used to configure the chip
ConfigReg_2
Configuration Register 2
Field
Q3
Q2
Q1
Q0
AGE
Data Sheet
default is port-based priority for un-tagged packets and non_IP frames.
Ethernet Packet from Layer 2
Bits
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
Bits
15:14
13:12
11:10
9:8
7
Destination (6
bytes)
Byte 0~5
Type
rw
rw
rw
rw
rw
rw
rw
rw
Type
rw
rw
rw
rw
rw
Source (6 bytes) Packet length (2
Byte 6~11
Description
Mapped priority of tag value (TOS)
Description
Discard mode
Drop scheme for Queue n
Aging Status
0
1
B
B
E, Enable
D, Disable
Offset
10
32
bytes)
Byte 12~13
H
Registers DescriptionEEPROM Content
Data (46-1500
bytes)
Byte 14~
Rev. 1.13, 2005-11-22
ADM6996L/LX
CRC (4 bytes)
Data Sheet
Reset Value
0040
H

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