MCZ33780EG Freescale, MCZ33780EG Datasheet - Page 3

MCZ33780EG

Manufacturer Part Number
MCZ33780EG
Description
Manufacturer
Freescale
Datasheet

Specifications of MCZ33780EG

Operating Supply Voltage (typ)
5/12/15/18/24V
Operating Supply Voltage (min)
4.75/9V
Operating Supply Voltage (max)
5.25/25V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Compliant

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Table 1. 33780 Pin Definitions
Analog Integrated Circuit Device Data
Freescale Semiconductor
A functional description of each pin can be found in the Functional Pin Descriptions section beginning on
Pin
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Pin Name
VSUP
MOSI
SCLK
MISO
GND
VCC
GND
GND
RST
CLK
D1H
D0H
D1L
D0L
INT
CS
Pin Function
Output Driver
Output Driver
Output Driver
Output Driver
Ground
Ground
Ground
Output
Output
Output
Reset
Input
Input
Input
Input
Input
SCLK
MOSI
MISO
GND
RST
CLK
INT
CS
SPI Chip Select Input When this signal is high, SPI signals are ignored. Asserting this pin low
Master Out Slave In
Master In Slave Out
Positive Supply for
Serial Data Clock
High-Side Bus 1
High-Side Bus 0
Interrupt Output
Low-Side Bus 1
Low-Side Bus 0
Power Ground
Power Ground
Formal Name
Logic Supply
Figure 3. 33780 Pin Connections
Clock Input
Bus Output
IC Reset
Ground
PIN CONNECTIONS
1
2
3
4
5
6
7
8
A low level on this pin returns all registers to a known state as indicated
in the section entitled
starts an SPI transaction. The SPI transaction is signaled as completed
when this signal returns high.
This output will be asserted low when an enabled interrupt condition
occurs. It contains a pullup current source that will perform a pullup when
unasserted.
SPI data into this IC. This data input is sampled on the positive edge of
SCLK.
Clocks in /out the data to/from the SPI. MISO data changes on the
negative transition of the SCLK. MOSI is sampled on the positive edge of
the SCLK.
SPI data sent to the MCU by this device. This data output changes on the
negative edge of SCLK. When CS is high, this pin is high impedance.
4.0 MHz clock input.
Ground reference for analog and digital circuits.
Logic power source input.
Bus 1 power return.
Bus 1 low side.
Bus 1 high side.
This supply input is used to provide the positive level output of the bus.
Bus 0 high side.
Bus 0 low side.
Bus 0 power return.
16
15
14
13
12
10
11
9
GND
D0L
D0H
VSUP
D1H
D1L
GND
VCC
Register and Bit Descriptions.
Definition
PIN CONNECTIONS
page
13.
33780
3

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