SI3011-F-FSR Silicon Laboratories Inc, SI3011-F-FSR Datasheet - Page 26

• Manufacturer Part Number: SI3011-F-FSR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3011-F-FSR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Si3050 + Si3011
5.16. DC Termination
The Si3050+Si3011 chipset has programmable settings
for the dc impedance and current limit. The dc
impedance of the DAA is normally represented with a
50  slope as shown in Figure 21, but can be changed
to an 800  slope by setting the DCR bit. This higher dc
termination presents a higher resistance to the line as
loop current increases.
For applications requiring current limiting per the TBR21
standard, the ILIM bit may be set to select this mode. In
this mode, the dc I/V curve is changed to a 2000 
slope above 40 mA, as shown in Figure 22. This allows
the DAA to operate with a 50 V, 230  feed, which is the
maximum linefeed specified in the TBR21 standard.
26
Figure 22. TBR21 Mode I/V Characteristics
Figure 21. FCC Mode I/V Characteristics
20
45
40
35
30
25
15
10
12
11
10
5
.015 .02 .025 .03 .035 .04 .045 .05 .055 .06
8
9
7
6
.01 .02 .03 .04 .05 .06 .07 .08 .09 .1 .11
TBR21 DCT Mode
Loop Current (A)
Loop Current (A)
FCC DCT Mode
Rev. 1.11
5.17. AC Termination
The Si3050+Si3011 chipset provides two ac termination
impedances. The ACIM bit in Register 30 is used to
select the ac impedance setting. The two available
settings for the Si3050+Si3011 chipset are listed in
Table 15. The programmable digital hybrid can be used
to further reduce near-end echo for each of the four
listed ac termination settings. See "5.28. Transhybrid
Balance" on page 32 for details.
5.18. Ring Detection
The ring signal is resistively coupled from TIP and RING
to the RNG1 and RNG2 pins. The Si3050 supports
either full- or half-wave ring detection. With full-wave
ring detection, the designer can detect a polarity
reversal of the ring signal. See “5.25.Caller ID” on
page 29. The ring detection threshold is programmable
with the RT2 bit (Register 17, bit 4). The ring detector
output can be monitored in three ways. The first method
uses the RGDT pin. The second method uses the
register bits, RDTP, RDTN, and RDT (Register 5). The
final method uses the DTX output.
The ring detector mode is controlled by the RFWE bit
(Register 18, bit 1). When the RFWE bit is 0 (default
mode), the ring detector operates in half-wave rectifier
mode. In this mode, only positive ring signals are
detected. A positive ring signal is defined as a voltage
greater than the ring threshold across RNG1-RNG2.
Conversely, a negative ring signal is defined as a
voltage less than the negative ring threshold across
RNG1-RNG2. When the RFWE bit is 1, the ring detector
operates in full-wave rectifier mode. In this mode, both
positive and negative ring signals are detected.
The first method to monitor ring detection output uses
the RGDT pin. When the RGDT pin is used, it defaults
to active low, but can be changed to active high by
setting the RPOL bit (Register 14, bit 1). This pin is an
open-drain output, and requires a 4.7 k pullup or
pulldown for correct operation. If multiple RGDT pins
are connected to a single input, the combined pullup or
pulldown resistance should equal 4.7 k
When the RFWE bit is 0, the RGDT pin is asserted
when the ring signal is positive, which results in an
output signal frequency equal to the actual ring
frequency. When the RFWE bit is 1, the RGDT pin is
asserted when the ring signal is positive or negative.
ACIM
0
1
Table 15. AC Termination Settings
600 
210  + (750  || 150 nF) and 275  +
(780  || 150 nF)
AC Termination