SI3011-F-FSR Silicon Laboratories Inc, SI3011-F-FSR Datasheet - Page 78

• Manufacturer Part Number: SI3011-F-FSR
• Manufacturer: Silicon Laboratories Inc

Specifications of SI3011-F-FSR

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Si3050 + Si3011
Register 33. PCM/SPI Mode Select
Reset settings = 0000_0000
78
Bit
4:3
7
5
2
1
0
Name
Type
Bit
PCMF[1:0]
Reserved
PCME
Name
PCML
PHCF
TRI
PCML
R/W
D7
PCM Analog Loopback.
0 = Normal operation.
1 = Enables analog data to be received from the line, converted to digital data and trans-
mitted across the ISOcap link. The data passes through the RX filter and is looped back
through the TX filter and is transmitted back out to the line.
PCM Enable (Registers 34–37 should be set before PCM transfers are enabled).
0 = Disable PCM transfers.
1 = Enable PCM transfers.
PCM Data Format.
00 = A-Law. Signed magnitude data format (refer to Table 20 on page 39).
01 = µ-Law. Signed magnitude data format (refer to Table 19 on page 38).
10 = 8-bit linear. The top 8-bits of the 16-bit linear signal are transferred, and the bottom
8-bits are discarded (2s complement data format).
11 = 16-bit linear (2s complement data format).
PCM Highway Clock Format.
0 = 1 PCLK per data bit.
1 = 2 PCLKs per data bit.
Tri-state Bit 0.
0 = Tri-state bit 0 on positive edge of PCLK.
1 = Tri-state bit 0 on negative edge of PCLK.
Always write this bit to zero.
R/W
D6
PCME
R/W
D5
Rev. 1.11
D4
PCMF[1:0]
R/W
Function
D3
R/W
D2
0
PHCF
R/W
D1
R/W
TRI
D0