HBLXT9781HC.C4 Intel, HBLXT9781HC.C4 Datasheet - Page 48

HBLXT9781HC.C4

Manufacturer Part Number
HBLXT9781HC.C4
Description
Manufacturer
Intel
Datasheet

Specifications of HBLXT9781HC.C4

Lead Free Status / RoHS Status
Not Compliant
LXT9761/9781 — Fast Ethernet 10/100 Multi-Port Transceiver with RMII
48
Figure 22. Typical Twisted-Pair Interface
1. The 100 transmit load termination resistor typically required is integrated in the LXT97xx.
2. Magnetics without a receive pair center-tap do not require a 2 kV termination.
3. Center tap current may be supplied from 3.3V VCCA as shown. However, additional power savings may be
4. Receive common mode bypass cap may improve BER performance in systems with noisy power supplies.
5. Recommended 0.1 F capacitor to improve the EMI performance.
realized by supplying the center-tap from from a 2.5V current source. In either case a single ferrite bead
(rated at 800 mA) may be used to supply center tap current to all ports.
LXT97x1
TPFON
TPFOP
GNDA
VCCT
TPFIN
TPFIP
270 pF 5%
0.1 F
270 pF 5%
1
50
5
50
0.01 F
4
.01 F
3
1:1
1:1
*
2
*
50
50
* = 0.001 F / 2.0 kV
50
50
50
50
RJ45
1
2
3
4
5
6
7
8
Datasheet

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