HBLXT9781HC.C4 Intel, HBLXT9781HC.C4 Datasheet - Page 56
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HBLXT9781HC.C4
Manufacturer Part Number
HBLXT9781HC.C4
Description
Manufacturer
Intel
Datasheet
1.HBLXT9781HC.C4.pdf
(78 pages)
Specifications of HBLXT9781HC.C4
Lead Free Status / RoHS Status
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LXT9761/9781 — Fast Ethernet 10/100 Multi-Port Transceiver with RMII
56
TXD<1:0> setup to REFCLK rising edge
TXD<1:0> hold from REFCLK rising edge
TX_EN sampled to TPFO out (Tx latency)
TX_EN setup to REFCLK rising edge
TX_EN hold from REFCLK rising edge
RXD<1:0>, CRS_DV, RXER setup to REFCLK rising edge
RXD<1:0>, CRS_DV, RXER hold from REFCLK rising edge
Receive start of “J” to CRS_DV asserted
Receive start of “T” to CRS_DV de-asserted
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing.
RXD(1:0)
CRS_DV
REFCLK
Table 24. 100BASE-TX Transmit Timing Parameters
Figure 28. 100BASE-FX Receive Timing
Table 25. 100BASE-FX Receive Timing Parameters
TPFI
Parameter
Parameter
t
3
Sym
Sym
t1
t2
t3
t4
t5
t1
t2
t3
t4
t
1
Min
4
2
–
4
2
t
Min
2
4
2
–
–
Typ
13
–
–
–
–
Typ
12
20
1
–
–
1
Max
–
–
–
–
–
Max
–
–
–
–
t
4
Units
BT
ns
ns
ns
ns
Units
BT
BT
ns
ns
Test Conditions
Test Conditions
Datasheet
–
–
–
–
–
–
–
–
–
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