PIC16F1823-I/SL Microchip Technology, PIC16F1823-I/SL Datasheet - Page 142
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16F1823-I/SL
Manufacturer Part Number
PIC16F1823-I/SL
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 12 I/0, Enhanced Mid Range Core 14
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC12F1822T-ISN.pdf
(404 pages)
3.PIC12F1822T-ISN.pdf
(10 pages)
Specifications of PIC16F1823-I/SL
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core
PIC
Processor Series
PIC16F
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
128 B
On-chip Adc
Yes
Number Of Programmable I/os
12
Number Of Timers
3
Operating Supply Voltage
2.3 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
A/d Bit Size
10 bit
A/d Channels Available
8
Height
1.25 mm
Interface Type
I2C, SPI, USART
Length
8.65 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.3 V
Width
3.9 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1823-I/SL
Manufacturer:
MICROCHIP
Quantity:
30 000
Part Number:
PIC16F1823-I/SL
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 142 of 404
- Download datasheet (4Mb)
PIC12F/LF1822/PIC16F/LF1823
16.1.5
The ADC module allows for the ability to generate an
interrupt upon completion of an Analog-to-Digital
conversion. The ADC Interrupt Flag is the ADIF bit in
the PIR1 register. The ADC Interrupt Enable is the
ADIE bit in the PIE1 register. The ADIF bit must be
cleared in software.
This interrupt can be generated while the device is
operating or while in Sleep. If the device is in Sleep, the
interrupt will wake-up the device. Upon waking from
Sleep, the next instruction following the SLEEP instruc-
tion is always executed. If the user is attempting to
wake-up from Sleep and resume in-line code execu-
tion, the GIE and PEIE bits of the INTCON register
must be disabled. If the GIE and PEIE bits of the
INTCON register are enabled, execution will switch to
the Interrupt Service Routine.
FIGURE 16-3:
DS41413B-page 142
Note 1: The ADIF bit is set at the completion of
(ADFM = 0)
(ADFM = 1)
2: The ADC operates during Sleep only
INTERRUPTS
every conversion, regardless of whether
or not the ADC interrupt is enabled.
when the F
10-BIT A/D CONVERSION RESULT FORMAT
MSB
bit 7
bit 7
RC
Unimplemented: Read as ‘0’
oscillator is selected.
ADRESH
10-bit A/D Result
Preliminary
MSB
bit 0
bit 0
16.1.6
The 10-bit A/D conversion result can be supplied in two
formats, left justified or right justified. The ADFM bit of
the ADCON1 register controls the output format.
Figure 16-3
bit 7
bit 7
RESULT FORMATTING
shows the two output formats.
10-bit A/D Result
LSB
Unimplemented: Read as ‘0’
2010 Microchip Technology Inc.
ADRESL
bit 0
LSB
bit 0
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