PIC16F1828-E/SS Microchip Technology, PIC16F1828-E/SS Datasheet - Page 172
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC16F1828-E/SS
Manufacturer Part Number
PIC16F1828-E/SS
Description
7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 18 I/0, Enhanced Mid Range Core 20 S
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16F1824-ISL.pdf
(2 pages)
3.PIC16F1824-ISL.pdf
(419 pages)
4.PIC16F1824-ISL.pdf
(10 pages)
Specifications of PIC16F1828-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP (0.200", 5.30mm Width)
Processor Series
PIC16F
Core
PIC
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC16F722-ISS PDF datasheet
- PIC16F1824-ISL PDF datasheet #2
- PIC16F1824-ISL PDF datasheet #3
- PIC16F1824-ISL PDF datasheet #4
- Current page: 172 of 419
- Download datasheet (4Mb)
PIC16(L)F1824/1828
REGISTER 18-2:
DS41419B-page 172
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
SRSPE
SRSPE: SR Latch Peripheral Set Enable bit
1 = SR latch is set when the SRI pin is high
0 = SRI pin has no effect on the set input of the SR latch
SRSCKE: SR Latch Set Clock Enable bit
1 = Set input of SR latch is pulsed with SRCLK
0 = SRCLK has no effect on the set input of the SR latch
SRSC2E: SR Latch C2 Set Enable bit
1 = SR latch is set when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the set input of the SR latch
SRSC1E: SR Latch C1 Set Enable bit
1 = SR latch is set when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the set input of the SR latch
SRRPE: SR Latch Peripheral Reset Enable bit
1 = SR latch is reset when the SRI pin is high
0 = SRI pin has no effect on the reset input of the SR latch
SRRCKE: SR Latch Reset Clock Enable bit
1 = Reset input of SR latch is pulsed with SRCLK
0 = SRCLK has no effect on the reset input of the SR latch
SRRC2E: SR Latch C2 Reset Enable bit
1 = SR latch is reset when the C2 Comparator output is high
0 = C2 Comparator output has no effect on the reset input of the SR latch
SRRC1E: SR Latch C1 Reset Enable bit
1 = SR latch is reset when the C1 Comparator output is high
0 = C1 Comparator output has no effect on the reset input of the SR latch
SRSCKE
R/W-0/0
SRCON1: SR LATCH CONTROL 1 REGISTER
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
SRSC2E
R/W-0/0
SRSC1E
R/W-0/0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
SRRPE
SRRCKE
R/W-0/0
2010 Microchip Technology Inc.
SRRC2E
R/W-0/0
SRRC1E
R/W-0/0
bit 0
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