PIC18LF25K22-E/SP Microchip Technology, PIC18LF25K22-E/SP Datasheet - Page 155
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PIC18LF25K22-E/SP
Manufacturer Part Number
PIC18LF25K22-E/SP
Description
32KB, Flash, 1536bytes-RAM,8-bit Family,nanoWatt XLP 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 10-10: LATx: PORTx OUTPUT LATCH REGISTER
REGISTER 10-11: LATE: PORTE OUTPUT LATCH REGISTER
REGISTER 10-12: WPUB: WEAK PULL-UP PORTB REGISTER
2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
R/W-x/u
WPUB7
LATx7
R/W-1
U-0
—
2:
2:
Register Description for LATA, LATB, LATC and LATD.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
Available on PIC18(L)F4XK22 devices only.
Writes to PORTA are written to corresponding LATA register. Reads from PORTA register is return of I/O
pin values.
LATx<7:0>: PORTx Output Latch bit value
Unimplemented: Read as ‘0’
LATE<2:0>: PORTE Output Latch bit value
WPUB<7:0>: Weak Pull-up Register bits
1 = Pull-up enabled on PORT pin
0 = Pull-up disabled on PORT pin
R/W-x/u
WPUB6
LATx6
R/W-1
U-0
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x/u
WPUB5
LATx5
R/W-1
U-0
—
R/W-x/u
WPUB4
LATx4
R/W-1
U-0
Preliminary
—
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x/u
WPUB3
LATx3
R/W-1
U-0
—
PIC18(L)F2X/4XK22
(1)
(1)
R/W-x/u
R/W-x/u
WPUB2
LATE2
LATx2
R/W-1
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
R/W-x/u
R/W-x/u
WPUB1
LATE1
LATx1
R/W-1
DS41412D-page 155
R/W-x/u
R/W-x/u
WPUB0
LATE0
LATx0
R/W-1
bit 0
bit 0
bit 0
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