PIC18LF25K22-E/SP Microchip Technology, PIC18LF25K22-E/SP Datasheet - Page 184
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PIC18LF25K22-E/SP
Manufacturer Part Number
PIC18LF25K22-E/SP
Description
32KB, Flash, 1536bytes-RAM,8-bit Family,nanoWatt XLP 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
14.3
Pulse-Width Modulation (PWM) is a scheme that
provides power to a load by switching quickly between
fully on and fully off states. The PWM signal resembles
a square wave where the high portion of the signal is
considered the on state and the low portion of the signal
is considered the off state. The high portion, also known
as the pulse width, can vary in time and is defined in
steps. A larger number of steps applied, which
lengthens the pulse width, also supplies more power to
the load. Lowering the number of steps applied, which
shortens the pulse width, supplies less power. The
PWM period is defined as the duration of one complete
cycle or the total amount of on and off time combined.
PWM resolution defines the maximum number of steps
that can be present in a single PWM period. A higher
resolution allows for more precise control of the pulse
width time and in turn the power that is applied to the
load.
The term duty cycle describes the proportion of the on
time to the off time and is expressed in percentages,
where 0% is fully off and 100% is fully on. A lower duty
cycle corresponds to less power applied and a higher
duty cycle corresponds to more power applied.
Figure 14-3
signal.
14.3.1
The standard PWM function described in this section is
available and identical for CCP and ECCP modules.
The standard PWM mode generates a Pulse-Width
modulation (PWM) signal on the CCPx pin with up to 10
bits of resolution. The period, duty cycle, and resolution
are controlled by the following registers:
• PRx registers
• TxCON registers
• CCPRxL registers
• CCPxCON registers
Figure 14-4
operation.
DS41412D-page 184
Note 1: The corresponding TRIS bit must be
2: Clearing the CCPxCON register will
PWM Overview
STANDARD PWM OPERATION
shows a simplified block diagram of PWM
cleared to enable the PWM output on the
CCPx pin.
relinquish control of the CCPx pin.
shows a typical waveform of the PWM
Preliminary
FIGURE 14-3:
FIGURE 14-4:
14.3.2
The following steps should be taken when configuring
the CCP module for standard PWM operation:
1.
2.
3.
4.
5.
Note 1:
Disable the CCPx pin output driver by setting the
associated TRIS bit.
Select the 8-bit TimerX resource, (Timer2,
Timer4 or Timer6) to be used for PWM genera-
tion by setting the CxTSEL<1:0> bits in the
CCPTMRSx register.
Load the PRx register for the selected TimerX
with the PWM period value.
Configure the CCP module for the PWM mode
by loading the CCPxCON register with the
appropriate values.
Load the CCPRxL register and the DCxB<1:0>
bits of the CCPxCON register, with the PWM
duty cycle value.
CCPRxH
Duty Cycle Registers
Comparator
2:
Pulse Width
CCPRxL
TMRx = 0
PRx
TMRx
Comparator
SETUP FOR PWM OPERATION
The 8-bit timer TMRx register is concatenated
with the 2-bit internal system clock (F
2 bits of the prescaler, to create the 10-bit time
base.
In PWM mode, CCPRxH is a read-only register.
(2)
Period
(Slave)
CCP PWM OUTPUT SIGNAL
(1)
SIMPLIFIED PWM BLOCK
DIAGRAM
Clear Timer,
toggle CCPx pin and
latch duty cycle
TMRx = CCPRxH:CCPxCON<5:4>
2010 Microchip Technology Inc.
CCPxCON<5:4>
(1)
TMRx = PRx
S
R
Q
TRIS
OSC
CCPx
), or
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