PIC24FJ64GA110-E/PT Microchip Technology, PIC24FJ64GA110-E/PT Datasheet - Page 175

16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY

PIC24FJ64GA110-E/PT

Manufacturer Part Number
PIC24FJ64GA110-E/PT
Description
16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheet

Specifications of PIC24FJ64GA110-E/PT

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (22K x 24)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC24FJ256GA110
Core
PIC
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
UART, I2C, SPI
Maximum Clock Frequency
8 MHz
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Quantity
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Part Number:
PIC24FJ64GA110-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
15.0
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices may be serial EEPROMs, shift reg-
isters, display drivers, A/D Converters, etc. The SPI
module is compatible with Motorola’s SPI and SIOP
interfaces. All devices of the PIC24FJ256GA110 family
include three SPI modules
The module supports operation in two buffer modes. In
Standard mode, data is shifted through a single serial
buffer. In Enhanced Buffer mode, data is shifted
through an 8-level FIFO buffer.
The module also supports a basic framed SPI protocol
while operating in either Master or Slave mode. A total
of four framed SPI configurations are supported.
 2010 Microchip Technology Inc.
Note:
Note:
SERIAL PERIPHERAL
INTERFACE (SPI)
Section 23. “Serial Peripheral Interface
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
(SPI)” (DS39699).
Do not perform read-modify-write opera-
tions (such as bit-oriented instructions) on
the SPIxBUF register in either Standard or
Enhanced Buffer mode.
Family
Reference
Manual”,
PIC24FJ256GA110 FAMILY
The SPI serial interface consists of four pins:
• SDIx: Serial Data Input
• SDOx: Serial Data Output
• SCKx: Shift Clock Input or Output
• SSx: Active-Low Slave Select or Frame
The SPI module can be configured to operate using 2,
3 or 4 pins. In the 3-pin mode, SSx is not used. In the
2-pin mode, both SDOx and SSx are not used.
Block diagrams of the module in Standard and
Enhanced modes are shown in
Figure
Synchronization I/O Pulse
Note:
15-2.
In this section, the SPI modules are
referred to together as SPIx or separately
as SPI1, SPI2 or SPI3. Special Function
Registers will follow a similar notation. For
example, SPIxCON1 and SPIxCON2
refer to the control registers for any of the
3 SPI modules.
DS39905E-page 175
Figure 15-1
and

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