PIC24FJ64GA110-E/PT Microchip Technology, PIC24FJ64GA110-E/PT Datasheet - Page 88

• Manufacturer Part Number: PIC24FJ64GA110-E/PT
• Description: 16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA110-E/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC24FJ256GA110
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC24FJ256GA110 FAMILY
REGISTER 7-14:
DS39905E-page 88
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-7
bit 6
bit 5
bit 4-3
bit 2
bit 1
bit 0
Note 1:
U-0
U-0
—
—
If an external interrupt is enabled, the interrupt input must also be configured to an available RPn or RPIn
pin. See
Unimplemented: Read as ‘0’
RTCIE: Real-Time Clock/Calendar Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
MI2C2IE: Master I2C2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SI2C2IE: Slave I2C2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
INT4IE
RTCIE
R/W-0
R/W-0
Section 10.4 “Peripheral Pin Select”
IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
(1)
W = Writable bit
‘1’ = Bit is set
INT3IE
R/W-0
U-0
—
(1)
U-0
U-0
—
—
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
for more information.
U-0
U-0
—
—
MI2C2IE
R/W-0
U-0
—
 2010 Microchip Technology Inc.
x = Bit is unknown
SI2C2IE
R/W-0
U-0
—
U-0
U-0
—
—
bit 8
bit 0