PIC24FJ64GA110-E/PT Microchip Technology, PIC24FJ64GA110-E/PT Datasheet - Page 251

• Manufacturer Part Number: PIC24FJ64GA110-E/PT
• Description: 16-bit, 16 MIPS, 64KB Flash, 16Kb RAM, 84 I/O, NanoWatt 100 TQFP 12x12x1mm TRAY
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ64GA110-E/PT

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 64KB (22K x 24)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: *
• Processor Series: PIC24FJ256GA110
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: UART, I2C, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

25.2
All PIC24FJ256GA110 family devices power their core
digital logic at a nominal 2.5V. This may create an issue
for designs that are required to operate at a higher
typical voltage, such as 3.3V. To simplify system
design, all devices in the PIC24FJ256GA110 family
incorporate an on-chip regulator that allows the device
to run its core logic from V
The regulator is controlled by the ENVREG pin. Tying V
to the pin enables the regulator, which in turn, provides
power to the core from the other V
ulator is enabled, a low-ESR capacitor (such as ceramic)
must
(Figure
regulator. The recommended value for the filter capacitor
(C
If ENVREG is tied to V
this case, separate power for the core logic at a nomi-
nal 2.5V must be supplied to the device on the
V
levels, typically 3.3V. Alternatively, the V
and V
nominal voltage. Refer to
configurations.
25.2.1
When it is enabled, the on-chip regulator provides a
constant voltage of 2.5V nominal to the digital core
logic.
The regulator can provide this level from a V
2.5V, all the way up to the device’s V
have the capability to boost V
order to prevent “brown-out” conditions when the volt-
age drops too low for the regulator, the regulator enters
Tracking mode. In Tracking mode, the regulator output
follows V
When the device enters Tracking mode, it is no longer
possible to operate at full speed. To provide information
about when the device enters Tracking mode, the
on-chip regulator includes a simple, Low-Voltage
Detect circuit. When V
ating voltage, the circuit sets the Low-Voltage Detect
Interrupt Flag, LVDIF (IFS4<8>). This can be used to
generate an interrupt and put the application into a
Low-Power Operational mode or trigger an orderly
shutdown.
Low-Voltage Detection is only available when the
regulator is enabled.
 2010 Microchip Technology Inc.
DDCORE
EFC
) is provided in
DD
be
25-1). This helps to maintain the stability of the
pins can be tied together to operate at a lower
On-Chip Voltage Regulator
DD
/V
CAP
VOLTAGE REGULATOR TRACKING
MODE AND LOW-VOLTAGE
DETECTION
connected
with a typical voltage drop of 100 mV.
pin to run the I/O pins at higher voltage
Section 28.1 “DC
DD
SS
to
, the regulator is disabled. In
drops below full-speed oper-
DD
.
the
Figure 25-1
DD
DD
levels below 2.5V. In
V
pins. When the reg-
DDCORE
DDMAX
Characteristics”.
DDCORE
for possible
. It does not
DD
/V
CAP
of about
PIC24FJ256GA110 FAMILY
/V
CAP
pin
DD
FIGURE 25-1:
Note 1:
Regulator Enabled (ENVREG tied to V
Regulator Disabled (ENVREG tied to ground):
Regulator Disabled (V
(10 F typ)
2.5V
C
2.5V
EFC
(1)
These are typical operating voltages. Refer
to
the full operating ranges of V
V
(1)
DDCORE
3.3V
Section 28.1 “DC Characteristics”
3.3V
.
CONNECTIONS FOR THE
ON-CHIP REGULATOR
(1)
V
ENVREG
V
V
DD
DDCORE
SS
DD
PIC24FJ256GA
V
ENVREG
V
V
V
ENVREG
V
V
DD
DDCORE
SS
DD
DDCORE
SS
tied to V
PIC24FJ256GA
PIC24FJ256GA
/V
CAP
/V
DS39905E-page 251
/V
DDCORE
CAP
CAP
DD
and
DD
):
):
for