ISP1507D1HNUM STEricsson, ISP1507D1HNUM Datasheet - Page 28

• Manufacturer Part Number: ISP1507D1HNUM
• Manufacturer: STEricsson

Specifications of ISP1507D1HNUM

• Lead Free Status / RoHS Status: Compliant

CD00269906
Product data sheet
For more information, refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1.
2. High-speed detection handshake (chirp)
a. Peripheral chirp: After detecting SE0 for no less than 2.5 μs, if the peripheral is
b. Host chirp: If the host does not detect the peripheral chirp, it must continue
c. High-speed idle: The peripheral must detect a minimum of Chirp K-J-K-J-K-J. Each
capable of high-speed, it sets XCVRSELECT[1:0] = 00b (high-speed) and
OPMODE[1:0] = 10b (chirp). The peripheral immediately follows this with a
TXCMD (NOPID), transmitting a Chirp K for no less than 1 ms and ending no more
than 7 ms after reset time T
up its clock within 5.6 ms, leaving 200 μs for the link to start transmitting the
Chirp K, and 1.2 ms for the Chirp K to complete (worst case with 10% slow clock).
asserting SE0 until the end of reset. If the host detects the peripheral Chirp K for
no less than 2.5 μs, then no more than 100 μs after the bus leaves the Chirp K
state, the host sends a TXCMD (NOPID) with an alternating sequence of Chirp Ks
and Js. Each Chirp K or Chirp J must last for no less than 40 μs and no longer than
60 μs.
Chirp K and Chirp J must be detected for at least 2.5 μs. The peripheral sets
TERMSELECT = 0b and OPMODE[1:0] = 00b after seeing the minimum Chirp
sequence. The peripheral is now in high-speed mode and sees !squelch (01b on
LINESTATE). When the peripheral sees squelch (10b on LINESTATE), it knows
that the host has completed chirp and waits for Hi-Speed USB traffic to begin. After
transmitting the chirp sequence, the host changes OPMODE[1:0] to 00b and
begins sending USB packets.
Rev. 03 — 28 July 2010
0
. If the peripheral is in low-power mode, it must wake
ULPI HS USB host and peripheral transceiver
ISP1507D1
© ST-ERICSSON 2010. All rights reserved.
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