ADV7312KST Analog Devices Inc, ADV7312KST Datasheet - Page 34

• Manufacturer Part Number: ADV7312KST
• Manufacturer: Analog Devices Inc

Specifications of ADV7312KST

• Number Of Dac's: 6
• Adc/dac Resolution: 11b
• Screening Level: Commercial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Not Compliant

SET ADDRESS 10h,
ADV7312
TIMING MODES
HD Async Timing Mode
[Subaddress 10h, Bit 3, 2]
For any input data that does not conform to the standards select-
able in input mode, Subaddress 10h, asynchronous timing mode
can be used to interface to the ADV7312. Timing control signals for
HSYNC, VSYNC, and BLANK have to be programmed by the
user. Macrovision and programmable oversampling rates are not
available in async timing mode.
SET ADDRESS 10h,
ANALOG OUTPUT
BIT 6 TO 1
P_HSYNC
P_VSYNC
P_BLANK
BIT 6 TO 1
P_HSYNC
P_BLANK
P_VSYNC
CLK
Figure 28a. Async Timing Mode—Programming Input Control Signals for SMPTE 295M Compatibility
CLK
Figure 28b. Async Timing Mode—Programming Input Control Signals for Bilevel Sync Signal
81
a
HORIZONTAL SYNC
a
66
HORIZONTAL SYNC
b
b
66
c
c
243
–34–
In async mode, the PLL must be turned off [Subaddress 00h,
Bit 1 = 1].
Figure 28a and Figure 28b show examples of how to program
the ADV7312 to accept a different high definition standard other
than SMPTE 293M, SMPTE 274M, SMPTE 296M, or
ITU-R BT.1358.
The following truth table must be followed when programming the
control signals in async timing mode. For standards that do not
require a tri-sync level, P_BLANK must be tied low at all times.
d
d
ACTIVE VIDEO
ACTIVE VIDEO
1920
e
PROGRAMMABLE
INPUT TIMING
ANALOG
OUTPUT
e
0
1
REV. 0