ADV7312KST Analog Devices Inc, ADV7312KST Datasheet - Page 66

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ADV7312KST

Manufacturer Part Number
ADV7312KST
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7312KST

Number Of Dac's
6
Adc/dac Resolution
11b
Screening Level
Commercial
Package Type
LQFP
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7312KST
Manufacturer:
ADI
Quantity:
624
ADV7312
APPENDIX 5—SD TIMING MODES
[Subaddress 4Ah]
Mode 0 (CCIR-656)—Slave Option
(Timing Register 0 TR0 = X X X X X 0 0 0)
The ADV7312 is controlled by the SAV (start active video) and
EAV (end active video) time codes in the pixel data. All timing
information is transmitted using a 4-byte synchronization pattern.
A synchronization pattern is sent immediately before and after
each line during active picture and retrace. S_VSYNC,
S_HSYNC, and S_BLANK (if not used) pins should be tied
high during this mode. Blank output is available.
NTSC /PAL M SYSTEM
(525 LINES/60Hz)
(625 LINES/50Hz)
INPUT PIXELS
PAL SYSTEM
ANALOG
VIDEO
Y
END OF ACTIVE
VIDEO LINE
C
r
Y
F
F
4 CLOCK
4 CLOCK
EAV CODE
0
0
0
0
X
Y
Figure 77. SD Slave Mode 0
8
0
1
0
8
0
1
0
–66–
ANCILLARY DATA
0
0
268 CLOCK
280 CLOCK
F
F
(HANC)
F
F
A
B
A
B
A
B
8
0
1
0
8
0
1
0
SAV CODE
4 CLOCK
F
F
4 CLOCK
START OF ACTIVE
0
0
VIDEO LINE
0
0
X
Y
C
b
Y C
1440 CLOCK
1440 CLOCK
r
Y
C
b
Y
C
r
Y
C
b
REV. 0

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