SAA7154E/V2/G NXP Semiconductors, SAA7154E/V2/G Datasheet - Page 18

• Manufacturer Part Number: SAA7154E/V2/G
• Manufacturer: NXP Semiconductors

Specifications of SAA7154E/V2/G

• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
SAA7154E_SAA7154H_2
Product data sheet
Fig 6. Analog video inputs and analog input control
AI11
AI12
AI13
AI14
AI21
AI22
AI23
AI24
AI31
AI32
AI33
AI34
AI41
AI42
AI43
AI44
7.1.2.2 Basic functional modes
7.1.2.3 I
SELECTION
4x MUX
INPUT
Decimation filtering is required to remove aliasing artifacts that can result from 4-fold
oversampling of SDTV signals (54 MHz sampling frequency and 13.5 MHz pixel rate) and
2-fold oversampling of HDTV signals.
These are the basic operation modes implemented in the AIC:
For certain applications with known and stable signal amplitude, AGC can be set to
manual. A single I
gain factor for this channel, which can be stored by the system controller. Afterwards,
immediate gain setting is achieved by just restoring the measured value whenever the
related channel is active.
2
•
•
•
•
C-bus read back of digital AGC gain factor
CVBS modes: working as fully autonomous AGC (default); can be changed to manual
gain control by setting bits GAFIXA = 1b and GAFIXD = 1b
S-video adaptive modes: Y channel acts as autonomous AGC and C channel follows
with its digital gain value; can be changed to manual gain control by setting bit
GAFIXD = 1b
S-video fixed-gain modes: Y channel running in AGC mode and C channel forced to
manual gain control; bits GAFIXA and GAFIXD have influence on Y channel only
Component signal (sync RGB, Y-C
manual gain control for the component channels; bits GAFIXA and GAFIXD have
influence on sync channel only.
ANALOG
GAIN
2
C-bus read back on a channel in use will provide the necessary digital
3-BIT ADC
Rev. 02 — 6 December 2007
A
ADC1
ADC4
TO
D
CONTROL
DECIMATOR/
DITHER
1 TO 4
B
-C
SAA7154E; SAA7154H
Multistandard video decoder with comb filter
R
) modes: sync running in AGC mode, forced
CROSSMUX
DIGITAL
GAIN
001aaa241
© NXP B.V. 2007. All rights reserved.
CVBS/Y
C
G/Y
R/P
B/P
FSW
R
B
18 of 90