ADV7196AKS Analog Devices Inc, ADV7196AKS Datasheet - Page 10

• Manufacturer Part Number: ADV7196AKS
• Manufacturer: Analog Devices Inc

Specifications of ADV7196AKS

• Adc/dac Resolution: 11b
• Screening Level: Commercial
• Package Type: MQFP
• Pin Count: 52
• Lead Free Status / RoHS Status: Not Compliant

ADV7196A
FUNCTIONAL DESCRIPTION
Digital Inputs
The digital inputs of the ADV7196A are TTL compatible. 30-bit
YCrCb or RGB pixel data in 4:4:4 format or 20-bit YCrCb pixel
data in 4:2:2 format is latched into the device on the rising edge
of each clock cycle at 74.25 MHz or 74.1758 in HDTV mode.
It is also possible to input 3 × 10 bit RGB data in 4:4:4 to the
ADV7196A. It is recommended to input data in 4:2:2 mode to
make use of the Chroma SSAFs on the ADV7196A. As can be
seen in the figure below, this filter has a 0 dB pass band response
and prevents signal components being folded back in to the fre-
quency band. In 4:4:4: input mode, the video data is already
interpolated by the external input device and the Chroma SSAFs
of the ADV7196A are bypassed.
Control Signals
The ADV7196A accepts sync control signals accompanied by
valid 4:2:2 or 4:4:4 data. These external horizontal, vertical and
blanking pulses (or EAV/SAV codes) control the insertion of
appropriate sync information into the output signals.
ATTEN
RL –10.0dBm
START 100kHz
ATTEN
RL –10.0dBm
START 100kHz
RBW 10kHz
RBW 10kHz
10dB
10dB
VBW 300Hz
VBW
VAVG
VAVG
10dB/
10dB/
1
4
300Hz
3.18MHz
3.12MHz
STOP
STOP
MKR
MKR
0dB
20.00MHz
–3.00dB
20.00MHz
SWP
SWP 17.0SEC
17.0SEC
Analog Outputs
The analog Y signal is output on the 11-Bit + Sync DAC A,
the color component analog signals on the 11-Bit DACs B, C
conforming to EIA-770.1 or EIA-770.2 standards in PS mode
or EIA-770.3 in HDTV mode. R
(EIA-770.1, EIA-770.2, EIA-770.3), R
For RGB outputs conforming to RS-170/RS-343A output standards
R
I
A selectable internal I
on the I
on the I
passed to the I
input bandwidth on the I
Undershoot Limiter
A limiter can be applied to the Y data before it is applied to the DACs.
Available limit values are –1.5 IRE, –6 IRE, –11 IRE below blank-
ing. This functionality is available in Progressive Scan mode only.
Internal Test Pattern Generator
The ADV7196A can generate a cross-hatch pattern (white lines
against a black background). Additionally, the ADV7196A can
output a uniform color pattern. The color of the lines or uniform
field/frame can be programmed by the user.
Y/CrCb Delay
The Y output and the color component outputs can be delayed
wrt the falling edge of the horizontal sync signal by up to four
clock cycles.
Gamma Correction
Gamma correction may be performed on the luma data. The
user has the choice to use either of two different gamma curves,
A or B. At any one time one of these curves is operational if gamma
correction is enabled. Gamma correction allows the mapping of
the luma data to a user-defined function.
54 MHz Operation
In Progressive Scan mode, it is possible to operate the three out-
put DACs at 54 MHz or 27 MHz. The ADV7196A is supplied
with a 27 MHz clock synced with the incoming data. If required, a
second stage interpolation filter interpolates the data to 54 MHz
before it is applied to the three output DACs. The second stage
interpolation filter is controlled by MR36. After applying a
Reset it is recommended to toggle this bit. Before toggling this bit,
3Ehex must be written to address 09hex.
PROGRAMMABLE SHARPNESS FILTER
Sharpness Filter Mode is applicable to the Y data only in Progres-
sive Scan mode. The desired frequency response can be chosen
by the user in programming the correct value via the I
variation of frequency responses can be seen in the figures on the
following pages.
PROGRAMMABLE ADAPTIVE FILTER CONTROL
If the Adaptive Filter Mode is enabled (Progressive Scan mode only),
it is possible to compensate for large edge transitions on the
incoming Y data. Sensitivity and attenuation are all program-
mable over the I
Filter Control and Adaptive Filter Control section.
2
SET
C Filters
must have a value of 2820 Ω.
2
2
C interface. In setting ALSB high, the input bandwidth
C lines is reduced and pulses of less than 50 ns are not
2
C controller. Setting ALSB low allows greater
2
C. For further information refer to Sharpness
2
C filter allows significant noise reduction
2
C lines.
SET
LOAD
has a value of 2470 Ω
has a value of 300 Ω.
2
C. The