MT41J64M16LA-187E:B Micron Technology Inc, MT41J64M16LA-187E:B Datasheet - Page 140

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MT41J64M16LA-187E:B

Manufacturer Part Number
MT41J64M16LA-187E:B
Description
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Datasheet

Specifications of MT41J64M16LA-187E:B

Organization
64Mx16
Density
1Gb
Address Bus
16b
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
265mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

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Part Number:
MT41J64M16LA-187E:B TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
SELF REFRESH TEMPERATURE (SRT)
SRT vs. ASR
DYNAMIC ODT
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf – Rev. J 05/10 EN
times referred to as 1X refresh rate). In the disabled mode, ASR requires the user to
ensure the DRAM never exceeds a T
bles the SRT feature listed below when the T
Enabling ASR assumes the DRAM self refresh rate is changed automatically from 1X to
2X when the case temperature exceeds +85°C. This enables the user to operate the
DRAM beyond the standard 85°C limit up to the optional extended temperature range
of +95°C while in self refresh mode.
The standard self refresh current test specifies test conditions to normal case tempera-
ture (+85°C) only, meaning if ASR is enabled, the standard self refresh current specifica-
tions do not apply (see Extended Temperature Usage (page 176)).
Mode register MR2[7] is used to disable/enable the SRT function. When SRT is disabled,
the self refresh mode’s refresh rate is assumed to be at the normal +85°C limit (some-
times referred to as 1X refresh rate). In the disabled mode, SRT requires the user to
ensure the DRAM never exceeds a T
enables ASR.
When SRT is enabled, the DRAM self refresh is changed internally from 1X to 2X, regard-
less of the case temperature. This enables the user to operate the DRAM beyond the
standard +85°C limit up to the optional extended temperature range of +95°C while in
self refresh mode. The standard self refresh current test specifies test conditions to nor-
mal case temperature (+85°C) only, meaning if SRT is enabled, the standard self refresh
current specifications do not apply (see Extended Temperature Usage (page 176)).
If the normal case temperature limit of 85°C is not exceeded, then neither SRT nor ASR
is required, and both can be disabled throughout operation. However, if the extended
temperature option of +95°C is needed, the user is required to provide a 2X refresh rate
during (manual) refresh and to enable either the SRT or the ASR to ensure self refresh is
performed at the 2X rate.
SRT forces the DRAM to switch the internal self refresh rate from 1X to 2X. Self refresh is
performed at the 2X refresh rate regardless of the case temperature.
ASR automatically switches the DRAM’s internal self refresh rate from 1X to 2X. Howev-
er, while in self refresh mode, ASR enables the refresh rate to automatically adjust
between 1X to 2X over the supported temperature range. One other disadvantage with
ASR is the DRAM cannot always switch from a 1X to a 2X refresh rate at an exact case
temperature of +85°C. Although the DRAM will support data integrity when it switches
from a 1X to a 2X refresh rate, it may switch at a lower temperature than +85°C.
Since only one mode is neccesary, SRT and ASR cannot be enabled at the same time.
The dynamic ODT (R
when a value is selected. This new DDR3 SDRAM feature enables the ODT termination
value to change without issuing an MRS command, essentially changing the ODT termi-
nation on-the-fly.
TT(WR)
) feature is defined by MR2[10, 9]. Dynamic ODT is enabled
140
C
C
of +85°C while in self refresh mode unless the user
of +85°C while in self refresh unless the user ena-
Micron Technology, Inc. reserves the right to change products or specifications without notice.
C
is between +85°C and +95°C.
1Gb: x4, x8, x16 DDR3 SDRAM
Mode Register 2 (MR2)
© 2006 Micron Technology, Inc. All rights reserved.

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