MT41J64M16LA-187E:B Micron Technology Inc, MT41J64M16LA-187E:B Datasheet - Page 46

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MT41J64M16LA-187E:B

Manufacturer Part Number
MT41J64M16LA-187E:B
Description
Manufacturer
Micron Technology Inc
Type
DDR3 SDRAMr
Datasheet

Specifications of MT41J64M16LA-187E:B

Organization
64Mx16
Density
1Gb
Address Bus
16b
Maximum Clock Rate
1.066GHz
Operating Supply Voltage (typ)
1.5V
Package Type
FBGA
Operating Temp Range
0C to 95C
Operating Supply Voltage (max)
1.575V
Operating Supply Voltage (min)
1.425V
Supply Current
265mA
Pin Count
96
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant

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Electrical Specifications – DC and AC
DC Operating Conditions
Table 21: DC Electrical Characteristics and Operating Conditions
All voltages are referenced to V
Input Operating Conditions
Table 22: DC Electrical Characteristics and Input Conditions
All voltages are referenced to V
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf – Rev. J 05/10 EN
Parameter/Condition
Supply voltage
I/O supply voltage
Input leakage current
Any input 0V ≤ V
(All other pins not under test = 0V)
V
V
(All other pins not under test = 0V)
Parameter/Condition
V
V
Input reference voltage command/address bus
I/O reference voltage DQ bus
I/O reference voltage DQ bus in SELF REFRESH
Command/address termination voltage
(system level, not direct DRAM input)
REF
REFDQ
IN
IN
low; DC/commands/address busses
high; DC/commands/address busses
supply leakage current
= V
DD
/2 or V
IN
≤ V
REFCA
Notes:
Notes:
DD
= V
, V
REF
DD
/2
1. V
2. V
3. V
4. The minimum limit requirement is for testing purposes. The leakage current on the V
1. V
2. DC values are determined to be less than 20 MHz in frequency. DRAM must meet specifi-
3. V
pin 0V ≤ V
SS
SS
V
DC (0 Hz to 250 kHz) specifications. V
timing parameters.
pin should be minimal.
level. Externally generated peak noise (noncommon mode) on V
±1% × V
ceed ±2% of V
cations if the DRAM induces additional AC noise greater than 20 MHz in frequency.
level. Externally generated peak noise (noncommon mode) on V
±1% × V
exceed ±2% of V
DD
SSQ
DD
REF
REFCA(DC)
REFDQ(DC)
and V
.
and V
(see Table 22).
IN
DD
DD
≤ 1.1V
is expected to be approximately 0.5 × V
DDQ
DDQ
is expected to be approximately 0.5 × V
around the V
around the V
must track one another. V
may include AC noise of ±50mV (250 kHz to 20 MHz) in addition to the
REFCA(DC)
REFDQ(DC)
V
V
V
Symbol
REFDQ(DC)
REFCA(DC)
REFDQ(sr)
Symbol
V
V
V
V
I
V
TT
VREF
IH
IL
.
DDQ
DD
I
I
REFCA(DC)
REFDQ(DC)
.
46
See Table 23
0.49 × V
0.49 × V
value. Peak-to-peak AC noise on V
value. Peak-to-peak AC noise on V
1.425
1.425
Min
Electrical Specifications – DC and AC
Min
V
V
–2
–1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
SS
SS
DD
DD
DD
and V
DDQ
1Gb: x4, x8, x16 DDR3 SDRAM
must be less than or equal to V
0.5 × V
DDQ
0.5 × V
0.5 × V
0.5 × V
Nom
Nom
1.5
1.5
n/a
n/a
DD
DD
must be at same level for valid AC
DDQ
and to track variations in the DC
and to track variations in the DC
DD
DD
DD
See Table 23
0.51 × V
0.51 × V
© 2006 Micron Technology, Inc. All rights reserved.
1.575
1.575
Max
Max
V
V
2
1
DD
DD
REFCA
REFDQ
DD
DD
REFCA
REFDQ
may not exceed
may not exceed
Units
should not ex-
Units Notes
should not
µA
µA
V
V
V
V
V
V
V
V
DD
. V
SS
Notes
1, 2
1, 2
1, 2
2, 3
=
4
4
5
REF

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