MT48H4M16LFB4-75 IT:H Micron Technology Inc, MT48H4M16LFB4-75 IT:H Datasheet - Page 35

• Manufacturer Part Number: MT48H4M16LFB4-75 IT:H
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48H4M16LFB4-75 IT:H

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 50mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Table 7:
PDF: 09005aef8237ed98/Source: 09005aef8237ed68
64mb_x16_Mobile SDRAM_Y24L_2.fm - Rev. C 10/07 EN
Write (auto
Row active
Read (auto
precharge
precharge
disabled)
disabled)
Current
State
Any
Idle
Truth Table 3 – Current State Bank n, Command to Bank n
Notes: 1–5; notes appear below table and on next page
CS#
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Notes:
RAS# CAS#
X
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
1. This table applies when CKE
2. This table is bank-specific, except where noted; for example, the current state is for a spe-
3. Current state definitions:
after
cific bank and the commands shown are those allowed to be issued to that bank when in
that state. Exceptions are covered in the notes below.
Idle:
Row
active:
Read:
Write:
The following states must not be interrupted by a command issued to the same bank. COM-
MAND INHIBIT or NOP commands, or allowable commands to the other bank, should be
issued on any clock edge occurring during these states. Allowable commands to the other
bank are determined by its current state and Table 7, and according to Table 8.
Precharging:
Row activating:
Read with auto
precharge
enabled:
Write with auto
precharge
enabled:
X
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
t
XSR has been met (if the previous state was self refresh).
WE# Command (Action)
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
L
L
The bank has been precharged, and
A row in the bank has been activated, and
accesses and no register accesses are in progress.
A READ burst has been initiated, with auto precharge disabled, and has not yet
terminated or been terminated.
terminated or been terminated.
A WRITE burst has been initiated, with auto precharge disabled, and has not yet
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
ACTIVE (Select and activate row)
AUTO REFRESH
LOAD MODE REGISTER
PRECHARGE
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE (Deactivate row in bank or banks)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE (Truncate READ burst, start PRECHARGE)
BURST TERMINATE
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE (Truncate WRITE burst, start PRECHARGE)
BURST TERMINATE
Starts with registration of a PRECHARGE command and ends when
met. After
Starts with registration of an ACTIVE command and ends when
met. After
Starts with registration of a READ command with auto precharge
enabled and ends when
be in the idle state.
Starts with registration of a WRITE command with auto precharge
enabled and ends when
be in the idle state.
n - 1
35
t
t
RP is met, the bank will be in the idle state.
RCD is met, the bank will be in the row active state.
was HIGH and CKE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
RP has been met. After
RP has been met. After
64Mb: 4 Meg x 16 Mobile SDRAM
t
RP has been met.
n
is HIGH (see Table 6 on page 34) and
t
RCD has been met. No data bursts/
©2006 Micron Technology, Inc. All rights reserved.
t
t
RP is met, the bank will
RP is met, the bank will
Operations
Notes
10
6
6
9
9
7
9
9
7
8
9
9
7
8
t
RCD is
t
RP is