MT48H4M16LFB4-75 IT:H Micron Technology Inc, MT48H4M16LFB4-75 IT:H Datasheet - Page 6

• Manufacturer Part Number: MT48H4M16LFB4-75 IT:H
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48H4M16LFB4-75 IT:H

• Organization: 4Mx16
• Density: 64Mb
• Address Bus: 14b
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 50mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

Figure 3:
PDF: 09005aef8237ed98/Source: 09005aef8237ed68
64mb_x16_Mobile SDRAM_Y24L_2.fm - Rev. C 10/07 EN
BA0, BA1
A0-A11,
CAS#
RAS#
WE#
CKE
CLK
CS#
14
Functional Block Diagram – 4 Meg x 16
ADDRESS
REGISTER
MODE REGISTER
CONTROL
LOGIC
12
Self refresh mode offers temperature compensation through an on-die temperature
sensor and partial-array self refresh (PASR). PASR enables users to achieve additional
power savings from normal usage. The temperature sensor is enabled by default and the
PASR settings can be programmed through the extended mode register.
SDRAM offers substantial advances in DRAM operating performance, including the
ability to synchronously burst data at a high data rate with automatic column-address
generation, the ability to interleave between internal banks to hide precharge time, and
the capability to randomly change column addresses on each clock cycle during a burst
access.
COUNTER
REFRESH
12
8
2
12
ADDRESS
2
ROW-
MUX
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
LOGIC
12
BANK
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
8
6
4096
READ DATA LATCH
SENSE AMPLIFIERS
DQM MASK LOGIC
(4,096 x 256 x 16)
WRITE DRIVERS
I/O GATING
DECODER
MEMORY
COLUMN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
ARRAY
BANK0
4096
(x16)
256
BANK1
BANK2
64Mb: 4 Meg x 16 Mobile SDRAM
BANK3
BA1
0
0
1
1
16
16
2
BA0
0
1
0
1
REGISTER
REGISTER
General Description
OUTPUT
©2006 Micron Technology, Inc. All rights reserved.
DATA
DATA
INPUT
Bank
0
1
2
3
2
16
LDQM,
UDQM
DQ0-
DQ15