SDINB11024 SanDisk, SDINB11024 Datasheet - Page 16

• Manufacturer Part Number: SDINB11024
• Manufacturer: SanDisk

Specifications of SDINB11024

• Lead Free Status / RoHS Status: Compliant

Revision 3.1
© 2006 SanDisk Corporation
3.3.1
3.3.2
3.3.3
3.3.4
3.4.1
3.4.2
3.3
3.4
Electrical Interface
Power Up
Bus Operating Conditions
Bus Timing (Default)
Bus Timing (High-Speed Mode)
iNAND Registers
Operating Conditions Register
Card Identification Register
The power scheme of SanDisk iNAND is handled locally in each card and in the bus
master. Refer to Section 6.4 of the SDA Physical Layer Specification, Version 2.00.
Refer to Section 6.4.1 of the SDA Physical Layer Specification, Version 2.00.
SPI Mode bus operating conditions are identical to SD Bus Mode operating conditions. For
details, see Section 6.6 of the SDA Physical Layer Specification, Version 2.00.
See Section 6.7 of the SDA Physical Layer Specification, Version 2.00.
See Section 6.8 of the SDA Physical Layer Specification, Version 2.00.
There is a set of eight registers within the iNAND interface. For specific information about
each register, refer to Section 5 of the SDA Physical Layer Specification, Version 2.00.
The Operation Conditions Register (OCR) stores the VDD voltage profile for iNAND.
Refer to Section 5.1 of the SDA Physical Layer Specification, Version 2.00.
The Card Identification (CID) Register is 16 bytes long and contains the unique card
identification number. It is programmed during manufacturing and cannot be changed by
iNAND hosts. See Table 3-3.
3-3
Chapter 3 – iNAND Interface Description
SanDisk iNAND Product Manual
12/07/06