SDINB11024 SanDisk, SDINB11024 Datasheet - Page 24

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SDINB11024

Manufacturer Part Number
SDINB11024
Description
Manufacturer
SanDisk
Datasheet

Specifications of SDINB11024

Lead Free Status / RoHS Status
Compliant
Revision 3.1
© 2006 SanDisk Corporation
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
4.3.4
Cyclic Redundancy Codes
Error Conditions
Commands
Card State Transition
Timing Diagrams and Values
Speed Class Specification
Erase Timeout Calculation
The Cyclic Redundancy Check (CRC) protects against transmission errors that may occur
on the iNAND bus. Detailed information and examples for CRC7 and CRC16 are provided
in Section 4.5 of the SDA Physical Layer Specification, Version 2.00.
See Section 4.6 of the SDA Physical Layer Specification, Version 2.00.
See Section 4.7 of the SDA Physical Layer Specification, Version 2.00 for detailed
information about iNAND commands.
The state transition is dependent on the received command. The transition is defined in
Section 4.8 of the SDA Physical Layer Specification, Version 2.00 along with responses
sent on the command line.
See Section 4.12 of the SDA Physical Layer Specification, Version 2.00.
The speed class specification classifies card performance by speed class number and offers
the method to calculate performance. For more information, refer to Section 4.13 of the
SDA Physical Layer Specification, Version 2.00.
See Section 4.14 of the SDA Physical Layer Specification, Version 2.00.
4-2
Chapter 4 – iNAND Protocol Description
SanDisk iNAND Product Manual
12/07/06

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