NP8P128A13T1760E Micron Technology Inc, NP8P128A13T1760E Datasheet - Page 91
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NP8P128A13T1760E
Manufacturer Part Number
NP8P128A13T1760E
Description
Manufacturer
Micron Technology Inc
Datasheet
1.NP8P128A13T1760E.pdf
(94 pages)
Specifications of NP8P128A13T1760E
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NP8P128A13T1760E
Manufacturer:
TI
Quantity:
1 043
Company:
Part Number:
NP8P128A13T1760E
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Numonyx® Omneo™ P8P Datasheet
Table 45: Partition and Erase-block Region Information
August 2010
316144-07
(P+3A)h (P+3A)h Partition 1 (Erase Block Type 2)
(P+3B)h (P+3B)h
(P+3C)h (P+3C)h
(P+3D)h (P+3D)h
(P+3E)h (P+3E)h
(P+30)h
(P+31)h
(P+32)h
(P+33)h
(P+34)h
(P+35)h
(P+36)h
(P+37)h
(P+38)h
(P+39)h
(P+3F)h
(P+40)h
(P+41)h
(P+42)h
(P+43)h
(P+3F)h
(P+30)h
(P+31)h
(P+32)h
(P+33)h
(P+34)h
(P+35)h
(P+36)h Partition Region 1 Erase Block Type 2 Information
(P+37)h
(P+38)h
(P+39)h
(P+40)h
(P+41)h
(P+42)h
(P+43)h
Partition Region 1 (Erase Block Type 1) Programming Region Information
Partition 1 (erase block Type 2) bits per cell; internal EDAC
Partition 1 (erase block Type 2) page mode and synchronous mode capabilities
defined in Table 10.
Partition Region 1 (Erase Block Type 2) Programming Region Information
bits 0–7 = x, 2^x = Programming Region aligned size (bytes)
bits 8–14 = Reserved; bit 15 = Legacy flash operation (ignore 0:7)
bits 16–23 = y = Control Mode valid size in bytes
bits 24-31 = Reserved
bits 32-39 = z = Control Mode invalid size in bytes
bits 40-46 = Reserved; bit 47 = Legacy flash operation (ignore 23:16 & 39:32)
bits 0–15 = y, y+1 = # identical-size erase blks in a partition
bits 16–31 = z, region erase block(s) size are z x 256 bytes
Block erase cycles x 1000
bits 0–3 = bits per cell in erase region
bit 4 = internal EDAC used (1=yes, 0=no)
bits 5–7 = reserve for future use
bit 0 = page-mode host reads permitted (1=yes, 0=no)
bit 1 = synchronous host reads permitted (1=yes, 0=no)
bit 2 = synchronous host writes permitted (1=yes, 0=no)
bits 3–7 = reserved for future use
bits 0–7 = x, 2^x = Programming Region aligned size (bytes)
bits 8–14 = Reserved; bit 15 = Legacy flash operation (ignore 0:7)
bits 16–23 = y = Control Mode valid size in bytes
bits 24-31 = Reserved
bits 32-39 = z = Control Mode invalid size in bytes
bits 40-46 = Reserved; bit 47 = Legacy flash operation (ignore 23:16 & 39:32)
6
4
2
1
1
6
13A:
13B:
13C:
13D:
13E:
13F:
140:
141:
142:
143:
144:
145:
146:
147:
148:
14A:
14B:
14C:
14D:
149:
13A:
13B:
13C:
13D:
13E:
13F:
14A:
14B:
14C:
14D:
140:
141:
142:
143:
144:
145:
146:
147:
148:
149:
91