M393T2950CZ3-CCC Samsung Semiconductor, M393T2950CZ3-CCC Datasheet - Page 19

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M393T2950CZ3-CCC

Manufacturer Part Number
M393T2950CZ3-CCC
Description
Manufacturer
Samsung Semiconductor
Datasheet

Specifications of M393T2950CZ3-CCC

Lead Free Status / RoHS Status
Compliant
13.0 Electrical Characteristics & AC Timing for DDR2-800/667/533/400
RDIMM
12.0 Input/Output Capacitance
* DM is internally loaded to match DQ and DQS identically.
13.1 Refresh Parameters by Device Density
13.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Input capacitance, CK and CK
Input capacitance, CKE and CS
Input capacitance, Addr,RAS,CAS,WE
Input/output capacitance, DQ, DM, DQS, DQS
Refresh to active/Refresh command time
Average periodic refresh interval
Bin
(0 °C < T
(CL - tRCD - tRP)
Parameter
tCK, CL=3
tCK, CL=4
tCK, CL=5
tCK, CL=6
Speed
tRCD
tRAS
tRC
tRP
Part-Number
Parameter
OPER
Parameter
< 95 °C; V
3.75
min
2.5
15
15
60
45
DDR2-800(F7)
5
-
DDQ
6 - 6 - 6
= 1.8V + 0.1V; V
70000
tRFC
tREFI
max
8
8
8
-
-
-
-
CCK
CI1
CI2
CIO
Symbol
DD
3.75
min
85 °C < T
0 °C ≤ T
15
15
60
45
DDR2-667(E6)
5
3
Symbol
-
M393T6553CZA
M393T6553CZ3
= 1.8V + 0.1V)
Min
-
-
-
-
5 - 5 - 5
CASE
CASE
19 of 25
70000
Max
max
11
12
12
10
≤ 85°C
≤ 95°C
8
8
8
-
-
-
-
M393T2953CZA
M393T2953CZ3
Min
-
-
-
-
3.75
3.75
min
256Mb
15
15
60
45
DDR2-533(D5)
5
-
7.8
3.9
75
4 - 4 - 4
Max
11
12
12
10
512Mb
70000
max
105
7.8
3.9
8
8
8
-
-
-
-
M393T2950CZA
M393T2950CZ3
Min
-
-
-
-
(VDD=1.8V, VDDQ=1.8V, TA=25
127.5
1Gb
7.8
3.9
Max
min
15
15
55
40
11
12
12
10
DDR2-400(CC)
5
5
-
-
3 - 3 - 3
DDR2 SDRAM
Rev. 1.8 May 2007
2Gb
195
7.8
3.9
M393T5750CZA
M393T5750CZ3
Min
-
-
-
-
70000
max
8
8
-
-
-
-
-
327.5
4Gb
7.8
3.9
Max
11
12
12
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
Units
Units
ns
µs
µs
pF
o
C)

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