MT18HTF25672PDY-80EE1 Micron Technology Inc, MT18HTF25672PDY-80EE1 Datasheet - Page 10

• Manufacturer Part Number: MT18HTF25672PDY-80EE1
• Manufacturer: Micron Technology Inc

Specifications of MT18HTF25672PDY-80EE1

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240RDIMM
• Device Core Size: 72b
• Organization: 256Mx72
• Total Density: 2GByte
• Chip Density: 1Gb
• Access Time (max): 40ps
• Maximum Clock Rate: 800MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.773A
• Number Of Elements: 18
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 65C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / RoHS Status: Compliant

Table 11:
PDF: 09005aef80e935cd/Source: 09005aef80e934a6
HTF18C64_128_256x72D.fm - Rev. D 9/06 EN
Parameter/Condition
Operating one bank active-precharge current:
t
commands; Address bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
BL = 4, CL = CL (I
(I
Address bus inputs are switching; Data pattern is same as I
Precharge power-down current: All device banks idle;
CKE is LOW; Other control and address bus inputs are stable; Data bus
inputs are floating
Precharge quiet standby current: All device banks idle;
CKE is HIGH, S# is HIGH; Other control and address bus inputs are stable;
Data bus inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching; Data
bus inputs are switching
Active power-down current: All device banks open;
t
inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
commands; Other control and address bus inputs are switching; Data bus
inputs are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
bus inputs are switching; Data bus inputs are switching
Operating burst read current; All device banks open; Continuous burst
reads, I
MAX (I
commands; Address bus inputs are switching; Data bus inputs are switching
Burst refresh current:
(I
control and address bus inputs are switching; Data bus inputs are switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and
address bus inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving
reads, I
t
S# is HIGH between valid commands; Address bus inputs are stable during
DESELECTs; Data bus inputs are switching
RC (I
CK =
RAS MAX (I
RP =
CK (I
DD
DD
),
) interval; CKE is HIGH, S# is HIGH between valid commands; Other
DD
DD
t
t
t
RP (I
RCD =
CK (I
DD
OUT
OUT
),
),
),
t
t
RAS =
RC =
DD
= 0mA; BL = 4, CL = CL (I
DD
= 0mA; BL = 4, CL = CL (I
t
RP =
DD
t
); CKE is HIGH, S# is HIGH between valid commands; Address
); CKE is LOW; Other control and address bus
DDR2 I
Values shown for MT47H128M8 DDR2 SDRAM only and are computed from values specified in the 1Gb
(128 Meg x 8) component data sheet
RCD (I
),
t
DD
RC (I
t
t
t
RP =
RAS MIN (I
RP (I
), AL = 0;
Notes:
DD
DD
DD
DD
); CKE is HIGH, S# is HIGH between valid commands;
t
RP (I
),
DD
t
); CKE is HIGH, S# is HIGH between valid
CK =
t
Specifications and Conditions – 2GB
RRD =
), AL = 0;
DD
t
1. a = Value calculated as one module rank in this operating condition; all other module ranks
2. b = Value calculated reflects all module ranks in this operating condition.
DD
CK =
); CKE is HIGH, S# is HIGH between valid
t
); CKE is HIGH, S# is HIGH between valid
CK (I
in I
t
RRD (I
t
DD
CK (I
DD
512MB, 1GB, 2GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM
DD
t
DD
CK =
2P (CKE LOW) mode.
), AL =
), AL = 0;
); REFRESH command at every
DD
DD
),
t
),
CK (I
t
t
RC =
RCD =
t
RCD (I
DD
t
CK =
t
),
RC (I
t
CK =
t
t
DD
t
RCD (I
RAS =
CK =
t
CK =
t
) -1 x
CK (I
DD
t
CK (I
),
t
t
OUT
DD
CK (I
CK =
t
t
DD
t
DD
t
CK (I
RAS MAX (I
t
RAS =
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
CK =
10
CK (I
); CKE is HIGH,
4W
DD
),
= 0mA;
DD
t
t
),
DD
RAS =
CK (I
DD
t
),
CK (I
t
t
); CKE is
RAS =
RAS MIN
);
t
RC =
t
DD
t
RFC
CK =
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
t
DD
RAS
);
);
),
Symbol -80E
I
I
I
I
I
I
I
DD
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
4W
2Q
2N
3N
2P
3P
4R
5
6
0
1
7
a
a
b
b
a
b
b
a
b
b
b
a
1,053
1,170
1,260 1,080
1,350 1,260
1,728 1,503 1,233 1,053
1,773 1,503 1,368 1,053
5,040 4,680 4,500 3,960
3,078 2,763 2,673 2,403
963
126
810
252
126
-667
873
963
126
990
720
252
126
©2006 Micron Technology, Inc. All rights reserved.
-53E
783
918
126
738
810
630
252
990
126
Capacitance
-40E
693
783
126
630
720
630
252
810
126
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA