ISP1760BEGA STEricsson, ISP1760BEGA Datasheet - Page 76

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ISP1760BEGA

Manufacturer Part Number
ISP1760BEGA
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1760BEGA

Package Type
LQFP
Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Table 80.
CD00222702
Product data sheet
Bit
DW7
63 to 40 reserved
39 to 32 ISO_IN_7[7:0]
DW6
31 to 24 ISO_IN_6[7:0]
23 to 16 ISO_IN_5[7:0]
15 to 8
7 to 0
DW5
63 to 56 ISO_IN_2[7:0]
55 to 48 ISO_IN_1[7:0]
47 to 40 ISO_IN_0[7:0]
39 to 32 μSCS[7:0]
DW4
31 to 29 Status7[2:0]
28 to 26 Status6[2:0]
25 to 23 Status5[2:0]
22 to 20 Status4[2:0]
19 to 17 Status3[2:0]
16 to 14 Status2[2:0]
13 to 11 Status1[2:0]
10 to 8
7 to 0
DW3
Symbol
ISO_IN_4[7:0]
ISO_IN_3[7:0]
Status0[2:0]
μSA[7:0]
Start and complete split for isochronous: bit description
Access
-
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
SW — writes
(0 → 1)
HW — writes
(1 → 0)
After processing
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
HW — writes
SW — writes
(0 → 1)
HW — writes
(1 → 0)
After processing
Value
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 08 — 13 April 2010
Description
-
Bytes received during μSOF7, if μSA[7] is set to 1 and frame
number is correct.
Bytes received during μSOF6, if μSA[6] is set to 1 and frame
number is correct.
Bytes received during μSOF5, if μSA[5] is set to 1 and frame
number is correct.
Bytes received during μSOF4, if μSA[4] is set to 1 and frame
number is correct.
Bytes received during μSOF3, if μSA[3] is set to 1 and frame
number is correct.
Bytes received during μSOF2 (bits 7 to 0), if μSA[2] is set to 1 and
frame number is correct.
Bytes received during μSOF1, if μSA[1] is set to 1 and frame
number is correct.
Bytes received during μSOF0 if μSA[0] is set to 1 and frame
number is correct.
All bits can be set to one for every transfer. It specifies which μSOF
the complete split needs to be sent. Valid only for IN. Start split and
complete split active bits, μSA = 0000 0001, μSCS = 0000 0100,
will cause SS to execute in μFrame0 and CS in μFrame2.
Isochronous IN or OUT status of μSOF7
Isochronous IN or OUT status of μSOF6
Isochronous IN or OUT status of μSOF5
Isochronous IN or OUT status of μSOF4
Isochronous IN or OUT status of μSOF3
Isochronous IN or OUT status of μSOF2
Isochronous IN or OUT status of μSOF1
Isochronous IN or OUT status of μSOF0
Bit 0 — Transaction error (IN and OUT)
Bit 1 — Babble (IN token only)
Bit 2 — Underrun (OUT token only)
Specifies which μSOF the start split needs to be placed.
For OUT token: When the frame number of bits DW2[7:3] matches
the frame number of the USB bus, these bits are checked for one
before they are sent for the μSOF.
For IN token: Only μSOF0, μSOF1, μSOF2 or μSOF3 can be set to
1. Nothing can be set for μSOF4 and above.
Embedded Hi-Speed USB host controller
© ST-ERICSSON 2010. All rights reserved.
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